From: Matthew Fortune <matthew.fort...@imgtec.com>
Cherry-picked 53d838794ad3379fdd8d1f3a812aa8f2dff56399
from https://github.com/MIPS/gcc
Signed-off-by: Matthew Fortune <matthew.fort...@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbaz...@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.ra...@htecgroup.com>
---
gcc/config/mips/mips.cc | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index cd4bce71ae8..a1208bcef69 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -9286,7 +9286,7 @@ mips_store_by_pieces_p (unsigned HOST_WIDE_INT size,
unsigned int align)
LW/SWL/SWR sequence. This is often better than the 4 LIs and
4 SBs that we would generate when storing by pieces. */
if (align <= BITS_PER_UNIT)
- return size < 4;
+ return size < 4 || !ISA_HAS_LWL_LWR;
/* If the data is 2-byte aligned, then:
@@ -9321,7 +9321,9 @@ mips_store_by_pieces_p (unsigned HOST_WIDE_INT size,
unsigned int align)
(c4) A block move of 8 bytes can use two LW/SW sequences or a single
LD/SD sequence, and in these cases we've traditionally preferred
the memory copy over the more bulky constant moves. */
- return size < 8;
+ return (size < 8
+ || (align < 4 * BITS_PER_UNIT
+ && !ISA_HAS_LWL_LWR));
}
/* Emit straight-line code to move LENGTH bytes from SRC to DEST.
--
2.34.1
