Earlier, we were gating SVE2 faminmax behind sve+faminmax. This was
incorrect and this patch changes it so that it is gated behind
sve2+faminmax.

gcc/ChangeLog:

        * config/aarch64/aarch64-sve2.md:
        (*aarch64_pred_faminmax_fused): Fix to use the correct flags.
        * config/aarch64/aarch64.h
        (TARGET_SVE_FAMINMAX): Remove.
        * config/aarch64/iterators.md: Fix iterators so that famax and
        famin use correct flags.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/sve/faminmax_1.c: Fix test to use the
        correct flags.
        * gcc.target/aarch64/sve/faminmax_2.c: Fix test to use the
        correct flags.
        * gcc.target/aarch64/sve/faminmax_3.c: New test.

        ---
        Hey,

        This patch is in response to Andrew's review here:
        https://gcc.gnu.org/pipermail/gcc-patches/2025-January/672934.html.

        Regression tested on aarch64-none-linux-gnu and found no
        regressions.

        Ok for master?

        Thanks,
        Saurabh
---
 gcc/config/aarch64/aarch64-sve2.md                |  2 +-
 gcc/config/aarch64/aarch64.h                      |  1 -
 gcc/config/aarch64/iterators.md                   |  8 ++++----
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c |  2 +-
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c |  2 +-
 gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c | 11 +++++++++++
 6 files changed, 18 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c

diff --git a/gcc/config/aarch64/aarch64-sve2.md b/gcc/config/aarch64/aarch64-sve2.md
index 60bc03b2650..3e08e092cd0 100644
--- a/gcc/config/aarch64/aarch64-sve2.md
+++ b/gcc/config/aarch64/aarch64-sve2.md
@@ -2950,7 +2950,7 @@
 	      (match_operand:SVE_FULL_F 3 "register_operand")]
 	     UNSPEC_COND_FABS)]
 	  SVE_COND_SMAXMIN))]
-  "TARGET_SVE_FAMINMAX"
+  "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2"
   {@ [ cons: =0 , 1   , 2  , 3 ; attrs: movprfx ]
      [ w        , Upl , %0 , w ; *              ] <faminmax_cond_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
      [ ?&w      , Upl , w  , w ; yes            ] movprfx\t%0, %2\;<faminmax_cond_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 218868a5246..3c8b972a8fd 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -472,7 +472,6 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED
 /* Floating Point Absolute Maximum/Minimum extension instructions are
    enabled through +faminmax.  */
 #define TARGET_FAMINMAX AARCH64_HAVE_ISA (FAMINMAX)
-#define TARGET_SVE_FAMINMAX (TARGET_SVE && TARGET_FAMINMAX)
 
 /* Lookup table (LUTI) extension instructions are enabled through +lut.  */
 #define TARGET_LUT AARCH64_HAVE_ISA (LUT)
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index e843c66cf26..9fbd7493988 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -3340,8 +3340,8 @@
 
 (define_int_iterator SVE_COND_FP_BINARY
   [UNSPEC_COND_FADD
-   (UNSPEC_COND_FAMAX "TARGET_SVE_FAMINMAX")
-   (UNSPEC_COND_FAMIN "TARGET_SVE_FAMINMAX")
+   (UNSPEC_COND_FAMAX "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
+   (UNSPEC_COND_FAMIN "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
    UNSPEC_COND_FDIV
    UNSPEC_COND_FMAX
    UNSPEC_COND_FMAXNM
@@ -3381,8 +3381,8 @@
 					    UNSPEC_COND_SMIN])
 
 (define_int_iterator SVE_COND_FP_BINARY_REG
-  [(UNSPEC_COND_FAMAX "TARGET_SVE_FAMINMAX")
-   (UNSPEC_COND_FAMIN "TARGET_SVE_FAMINMAX")
+  [(UNSPEC_COND_FAMAX "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
+   (UNSPEC_COND_FAMIN "TARGET_FAMINMAX && TARGET_SVE2_OR_SME2")
    UNSPEC_COND_FDIV
    UNSPEC_COND_FMULX])
 
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
index 3b65ccea065..154dbd9de84 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_1.c
@@ -3,7 +3,7 @@
 
 #include "arm_sve.h"
 
-#pragma GCC target "+sve+faminmax"
+#pragma GCC target "+sve2+faminmax"
 
 #define TEST_FAMAX(TYPE)						\
   void fn_famax_##TYPE (TYPE * restrict a,				\
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
index d80f6eca8f8..44ecef1e087 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_2.c
@@ -3,7 +3,7 @@
 
 #include "arm_sve.h"
 
-#pragma GCC target "+sve+faminmax"
+#pragma GCC target "+sve2+faminmax"
 
 #define TEST_WITH_SVMAX(TYPE)						\
   TYPE fn_fmax_##TYPE (TYPE x, TYPE y) {				\
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c
new file mode 100644
index 00000000000..2b01fa48b8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/faminmax_3.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+#pragma GCC target ("arch=armv9.2-a+sve2")
+
+void
+test (svbool_t p, svfloat16_t a, svfloat16_t b)
+{
+  svamax_f16_m (p, a, b); /* { dg-error {ACLE function 'svamax_f16_m' requires ISA extension 'faminmax'} } */
+}

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