This is something I spotted working on an outstanding issue with
pr116256. It's a latent regression. I'm reasonably sure that with
some effort I could find a testcase that would represent a regression,
probably just by adjusting the constant index in "f" within in
gcc.c-torture/execute/index-1.c
We have to define_insn_and_split patterns that potentially reassociate
shifts and adds to make a constant term cheaper to synthesize. The split
code for these two patterns assumes that if the left shifted constant is
cheaper than the right shifted constant then the left shifted constant
can be loaded with a trivial set. That is not always the case -- and
we'll ICE.
This patch simplifies the matching condition so that it only matches
when the constant can be loaded with a single instruction.
Tested in my tester on rv32 and rv64. Will wait for precommit CI to
render a verdict.
Jeff
PR target/116256
gcc/
* config/riscv/riscv.md (reassocating constant addition): Adjust
condition to avoid creating an unrecognizable insn.
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index c2a9de61052..2f709dce5db 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -4680,11 +4680,7 @@ (define_insn_and_split ""
(match_operand 2 "const_int_operand" "n"))
(match_operand 3 "const_int_operand" "n")))
(clobber (match_scratch:DI 4 "=&r"))]
- "(TARGET_64BIT
- && riscv_const_insns (operands[3], false)
- && ((riscv_const_insns (operands[3], false)
- < riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL
(operands[2])), false))
- || riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL
(operands[2])), false) == 0))"
+ "(TARGET_64BIT && riscv_const_insns (operands[3], false) == 1)"
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 1) (match_dup 2)))
@@ -4700,11 +4696,7 @@ (define_insn_and_split ""
(match_operand 2 "const_int_operand" "n"))
(match_operand 3 "const_int_operand" "n"))))
(clobber (match_scratch:DI 4 "=&r"))]
- "(TARGET_64BIT
- && riscv_const_insns (operands[3], false)
- && ((riscv_const_insns (operands[3], false)
- < riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL
(operands[2])), false))
- || riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL
(operands[2])), false) == 0))"
+ "(TARGET_64BIT && riscv_const_insns (operands[3], false) == 1)"
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 1) (match_dup 2)))