> On Fri, Nov 8, 2024 at 10:21 AM Mayshao-oc <[email protected]> wrote: > > > > > > -----Original Message----- > > > > From: Xi Ruoyao <[email protected]> > > > > Sent: Thursday, November 7, 2024 1:12 PM > > > > To: Liu, Hongtao <[email protected]>; Mayshao-oc <Mayshao- > > > > [email protected]>; Hongtao Liu <[email protected]> > > > > Cc: [email protected]; [email protected]; [email protected]; > > > > [email protected]; Tim Hu(WH-RD) <[email protected]>; > > > > Silvia > > > > Zhao(BJ-RD) <[email protected]>; Louis Qi(BJ-RD) > > > > <[email protected]>; Cobe Chen(BJ-RD) <[email protected]> > > > > Subject: Re: [PATCH] [x86_64] Add microarchtecture tunable for > > > > pass_align_tight_loops On Thu, 2024-11-07 at 04:58 +0000, Liu, > > > > Hongtao wrote: > > > > > > > > Hi all: > > > > > > > > For zhaoxin, I find no improvement when enable > > > > > > > > pass_align_tight_loops, and have performance drop in some cases. > > > > > > > > This patch add a new tunable to bypass > > > > > > > > pass_align_tight_loops in > > > > > > zhaoxin. > > > > > > > > > > > > > > > > Bootstrapped X86_64. > > > > > > > > Ok for trunk? > > > > > LGTM. > > > > > > > > I'd suggest to add the reference to PR 117438 into the subject and > > > > ChangeLog. > > > Yes, thanks. > > Add PR 117438 into the subject and ChangeLog. > PR target/117438 > Others LGTM. > > > > > > > > -- > > > > Xi Ruoyao <[email protected]> > > > > School of Aerospace Science and Technology, Xidian University > > BR > > Mayshao > > > > -- > BR, > Hongtao
Hi Hongtao: It seems no further comments. Could you please help me commit this patch? BR Mayshao
0001-x86_64-Add-microarchtecture-tunable-for-pass_align_v3.patch
Description: 0001-x86_64-Add-microarchtecture-tunable-for-pass_align_v3.patch
