On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/pure-code/no-literal-pool-m0.c: Use
> effective-target arm_cpu_cortex-m0.
> * gcc.target/arm/pure-code/no-literal-pool-m23.c: Use
> effective-target arm_cpu_cortex-m23.
> * gcc.target/arm/pure-code/pr109800.c: Use effective-target
> arm_arch_v7m and added option "-mcpu=unset".
> * target-supports.exp: Define effective-target
> arm_cpu_cortex_m0 and arm_cpu_cortex_m23.
>
> Signed-off-by: Torbjörn SVENSSON <[email protected]>
See comments on individual tests.
> ---
> gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c | 5 +++--
> gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c | 5 +++--
> gcc/testsuite/gcc.target/arm/pure-code/pr109800.c | 3 ++-
> gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c | 5 +++--
> gcc/testsuite/lib/target-supports.exp | 2 ++
> 5 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c
> b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c
> index bd6f4af183b..5bdbebb1a53 100644
> --- a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c
> +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c
> @@ -1,6 +1,7 @@
> /* { dg-do compile } */
> -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> -/* { dg-options "-mpure-code -mcpu=cortex-m0 -march=armv6s-m -mthumb
> -mfloat-abi=soft" } */
> +/* { dg-require-effective-target arm_cpu_cortex_m0_ok } */
> +/* { dg-options "-mpure-code" } */
> +/* { dg-add-options arm_cpu_cortex_m0 }*/
> /* { dg-final { check-function-bodies "**" "" } } */
OK
>
> /* Does not use thumb1_gen_const_int.
> diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c
> b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c
> index 95370126ce8..80a6b51138b 100644
> --- a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c
> +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c
> @@ -1,6 +1,7 @@
> /* { dg-do compile } */
> -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> -/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb
> -mfloat-abi=soft" } */
> +/* { dg-require-effective-target arm_cpu_cortex_m23_ok } */
> +/* { dg-options "-mpure-code" } */
> +/* { dg-add-options arm_cpu_cortex_m23 } */
> /* { dg-final { check-function-bodies "**" "" } } */
OK
>
> /*
> diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
> b/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
> index d797b790232..ace37cd6bc9 100644
> --- a/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
> +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-require-effective-target arm_arch_v7m_link } */
Why do we need 'link' here, when the dg-do is 'compile'?
> /* { dg-require-effective-target arm_hard_ok } */
> -/* { dg-options "-O2 -march=armv7-m -mfloat-abi=hard -mfpu=fpv4-sp-d16
> -mbig-endian -mpure-code" } */
> +/* { dg-options "-O2 -mcpu=unset -march=armv7-m -mfloat-abi=hard
> -mfpu=fpv4-sp-d16 -mbig-endian -mpure-code" } */
Hmm, this architecture doesn't have an FPU, though armv7e-m does (and it's
equivalent to the fpv4-sp-d16). So I think we want another entry in
target-supports for this: v7em_hard (that uses armv7e-m+fp and -mfpu=auto).
Then the rules here collapse to
dg-do compile
dg-r-e-t arm_arch_v7em_hard_ok
dg-options "-O2 -mbig-endian -mpure-code"
dg-add-options arm_arch_v7em_hard
> double f() { return 5.0; }
> diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c
> b/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c
> index 31061d5d445..68c223fbd15 100644
> --- a/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c
> +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c
> @@ -1,6 +1,7 @@
> /* { dg-do compile } */
> -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
> -/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb
> -mfloat-abi=soft" } */
> +/* { dg-require-effective-target arm_cpu_cortex_m23_ok } */
> +/* { dg-options "-mpure-code" } */
> +/* { dg-add-options arm_cpu_cortex_m23 } */
>
OK
> typedef int __attribute__ ((__vector_size__ (16))) V;
>
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index 01ed55ed82f..d973b1863bd 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -5848,6 +5848,8 @@ foreach { armfunc armflag armdefs } {
> foreach { armfunc armflag armdefs } {
> xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" "__XSCALE__ &&
> !__thumb__"
> cortex_a57 "-mcpu=cortex-a57" __ARM_ARCH_8A__
> + cortex_m0 "-mcpu=cortex-m0 -mfloat-abi=soft -mthumb"
> "__ARM_ARCH_6M__ && __thumb__"
> + cortex_m23 "-mcpu=cortex-m23 -mfloat-abi=soft -mthumb"
> "__ARM_ARCH_8M_BASE__ && __thumb__"
> } {
> eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
> proc check_effective_target_arm_cpu_FUNC_ok { } {
OK
So overall, OK with the suggested changes (assuming that doesn't cause other
issues).
R.
