On Tue, 19 Nov 2024, Jakub Jelinek wrote:

> Hi!
> 
> extract_bit_field can't handle extraction of non-mode precision
> from complex mode operands which don't live in memory, e.g. gen_lowpart
> crashes on those.
> The following patch in that case defers the extract_bit_field call
> until op0 is forced into memory.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

OK.

> 2024-11-19  Jakub Jelinek  <ja...@redhat.com>
> 
>       PR middle-end/117458
>       * expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Don't
>       call extract_bit_field if op0 has complex mode and isn't a MEM,
>       instead first force op0 into memory and then call extract_bit_field.
> 
>       * gcc.dg/bitint-116.c: New test.
> 
> --- gcc/expr.cc.jj    2024-11-08 12:38:10.684495739 +0100
> +++ gcc/expr.cc       2024-11-18 18:35:47.259349847 +0100
> @@ -12505,7 +12505,9 @@ expand_expr_real_1 (tree exp, rtx target
>       op0 = convert_modes (mode, GET_MODE (op0), op0,
>                            TYPE_UNSIGNED (TREE_TYPE (treeop0)));
>        /* If the output type is a bit-field type, do an extraction.  */
> -      else if (reduce_bit_field && mode != BLKmode)
> +      else if (reduce_bit_field
> +            && mode != BLKmode
> +            && (MEM_P (op0) || !COMPLEX_MODE_P (GET_MODE (op0))))
>       return extract_bit_field (op0, TYPE_PRECISION (type), 0,
>                                 TYPE_UNSIGNED (type), NULL_RTX,
>                                 mode, mode, false, NULL);
> @@ -12529,6 +12531,11 @@ expand_expr_real_1 (tree exp, rtx target
>  
>         emit_move_insn (target, op0);
>         op0 = target;
> +
> +       if (reduce_bit_field && mode != BLKmode)
> +         return extract_bit_field (op0, TYPE_PRECISION (type), 0,
> +                                   TYPE_UNSIGNED (type), NULL_RTX,
> +                                   mode, mode, false, NULL);
>       }
>  
>        /* If OP0 is (now) a MEM, we need to deal with alignment issues.  If 
> the
> --- gcc/testsuite/gcc.dg/bitint-116.c.jj      2024-11-18 18:50:05.322348174 
> +0100
> +++ gcc/testsuite/gcc.dg/bitint-116.c 2024-11-18 18:50:57.785614318 +0100
> @@ -0,0 +1,11 @@
> +/* PR middle-end/117458 */
> +/* { dg-do compile { target bitint } } */
> +/* { dg-options "-std=c23 -O2" } */
> +
> +typedef _BitInt(33) B __attribute__((may_alias));
> +
> +_BitInt(33)
> +foo (_Complex float x)
> +{
> +  return *(B *)&x;
> +}
> 
>       Jakub
> 
> 

-- 
Richard Biener <rguent...@suse.de>
SUSE Software Solutions Germany GmbH,
Frankenstrasse 146, 90461 Nuernberg, Germany;
GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)

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