This patch changes TARGET_POPCNTB to TARGET_POWER5. The -mpopcntb switch is not
being changed in this patch, just the name of the macros used to determine if
the PowerPC processor supports ISA 2.2 (Power5).
I have tested this on both big and little endian PowerPC systems and there is
no regresion. Can I check it into GCC 15.
2024-11-15 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* gcc/config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
Change TARGET_POPCNTB to TARGET_POWER5.
* gcc/config/rs6000/rs6000.cc (rs6000_option_override_internal):
Likewise.
* gcc/config/rs6000/rs6000.h (TARGET_FCFID): Likewise.
(TARGET_POWER5): New macro.
(TARGET_EXTRA_BUILTINS): Change TARGET_POPCNTB to TARGET_POWER5.
(TARGET_FRE): Likewise.
(TARGET_FRSQRTES): Likewise.
* gcc/config/rs6000/rs6000.md (enabled attribute): Likewise.
---
gcc/config/rs6000/rs6000-builtin.cc | 2 +-
gcc/config/rs6000/rs6000.cc | 2 +-
gcc/config/rs6000/rs6000.h | 11 +++++++----
gcc/config/rs6000/rs6000.md | 2 +-
4 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc
b/gcc/config/rs6000/rs6000-builtin.cc
index 9bdbae1ecf9..98a0545030c 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -155,7 +155,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins
fncode)
case ENB_ALWAYS:
return true;
case ENB_P5:
- return TARGET_POPCNTB;
+ return TARGET_POWER5;
case ENB_P6:
return TARGET_CMPB;
case ENB_P6_64:
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 950fd947fda..84b23f58d85 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3924,7 +3924,7 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags |= (ISA_2_5_MASKS_EMBEDDED & ~ignore_masks);
else if (TARGET_FPRND)
rs6000_isa_flags |= (ISA_2_4_MASKS & ~ignore_masks);
- else if (TARGET_POPCNTB)
+ else if (TARGET_POWER5)
rs6000_isa_flags |= (ISA_2_2_MASKS & ~ignore_masks);
else if (TARGET_ALTIVEC)
rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~ignore_masks);
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index d460eb06544..80d954e1178 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -448,7 +448,7 @@ extern int rs6000_vector_align[];
Enable 32-bit fcfid's on any of the switches for newer ISA machines. */
#define TARGET_FCFID (TARGET_POWERPC64 \
|| TARGET_PPC_GPOPT /* 970/power4 */ \
- || TARGET_POPCNTB /* ISA 2.02 */ \
+ || TARGET_POWER5 /* ISA 2.02 */ \
|| TARGET_CMPB /* ISA 2.05 */ \
|| TARGET_POPCNTD) /* ISA 2.06 */
@@ -501,6 +501,9 @@ extern int rs6000_vector_align[];
#define TARGET_MINMAX (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT \
&& (TARGET_P9_MINMAX || !flag_trapping_math))
+/* Convert ISA bits like POPCNTB to PowerPC processors like POWER5. */
+#define TARGET_POWER5 TARGET_POPCNTB
+
/* In switching from using target_flags to using rs6000_isa_flags, the options
machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. The MASK_<xxxx>
options that have not yet been replaced by their OPTION_MASK_<xxx>
@@ -527,7 +530,7 @@ extern int rs6000_vector_align[];
#define TARGET_EXTRA_BUILTINS (TARGET_POWERPC64 \
|| TARGET_PPC_GPOPT /* 970/power4 */ \
- || TARGET_POPCNTB /* ISA 2.02 */ \
+ || TARGET_POWER5 /* ISA 2.02 */ \
|| TARGET_CMPB /* ISA 2.05 */ \
|| TARGET_POPCNTD /* ISA 2.06 */ \
|| TARGET_ALTIVEC \
@@ -543,9 +546,9 @@ extern int rs6000_vector_align[];
#define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT)
#define TARGET_FRE (TARGET_HARD_FLOAT \
- && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode)))
+ && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode)))
-#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POPCNTB \
+#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POWER5 \
&& TARGET_PPC_GFXOPT)
#define TARGET_FRSQRTE (TARGET_HARD_FLOAT \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 8eda2f7bb0d..9c7e92d5fe2 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -379,7 +379,7 @@ (define_attr "enabled" ""
(const_int 1)
(and (eq_attr "isa" "p5")
- (match_test "TARGET_POPCNTB"))
+ (match_test "TARGET_POWER5"))
(const_int 1)
(and (eq_attr "isa" "p6")
--
2.47.0
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meiss...@linux.ibm.com
