These patches replaces the first patch in the 11 patch set that separates PowerPC architecture bits from ISA flags that use command line options.
The V2 patch thread starts at: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668177.html The are two differences from the previous patches: 1) I updated the initial copyright and comment section to fix the date the file will be added, and to replace Richard Kenner with my own name since I created the file. I'm sorry about not catching that initially. 2) In looking at the patches, it appears I forgot to post patch #6 that replaces TARGET_CMPB with TARGET_POWER6. Here is the description from the original V2 patches: These patches are a clean up in the PowerPC port to move architecture bits that are not user ISA options from rs6000_isa_flags to a new targt variable rs6000_arch_flags. The intention is to remove switches that are currently isa options, but the user should not be using this particular option. For example, we want users to use -mcpu=power10 and not just -mpower10. This is version 2 of my patches. The difference between this patch and the previous patch is if you configure a GCC compiler on a little endian server without using --with-cpu, the previous patch would set the .machine option to powerpc. This patch now sets the .machine option to power8, which is the minimum ISA level for little endian 32-bit. The previous patches were at: https://gcc.gnu.org/pipermail/gcc-patches/2024-October/666529.html There are 11 patches in this series. I have tested these patches on both little endian and big endian systems and there are no regressions. Can I apply these patches to the trunk? I don't see the need to backport these changes to the earlier branches, but if desired I can do that. The patches are: Patch #1: This patch sets up the infrastructure to have a separate architecture flags. It moves the target_clones attribute to use this new architecture flags. The generation of ".machine" now also uses this table. Patch #2: For newer PowerPC architectures, the architecture flags are used for defining '_ARCH_PWR<n>' instead of the isa flags. The -mpower10 and -mpower11 options are removed. Patch #3: The code is restructured so that -mvsx does not convert the processor to power7. Thus using -mvsx is not allowed unless the user uses -mcpu=power7 or later. Patch #4: Change uses of TARGET_POPCNTB to TARGET_POWER5. Patch #5: Change uses of TARGET_FPRND to TARGET_POWER5X. Patch #6: Change uses of TARGET_CMPB to TARGET_POWER6. Patch #7: Change uses of TARGET_POPCNTD to TARGET_POWER7. Patch #8: Change uses of TARGET_MODULO to TARGET_POWER9. Patch #9: Rework tests that use -mvsx to raise the cpu to power7 to explicitly add an appropriate #pragma to force the code generation to a power7. Patch #10: Add support for a -mcpu=future option. Patch #11: Make -mtune=future (and -mcpu=future without an explicit -mtune= option) automatically schedudle insns like -mtune=power10 or -mtune=power11. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com
