Ok for trunk?

--

With the changes in r15-1579-g792f97b44ff, the code used as "padding" in
the test case is optimized way. Prevent this optimization by forcing a
read of the volatile memory.
Also, validate that there is a far jump in the generated assembler.

Without this patch, the generated assembler is reduced to:
f3:
        cmp     r0, #0
        beq     .L1
        ldr     r4, .L6
.L1:
        bx      lr
.L7:
        .align  2
.L6:
        .word   g_0_1

With the patch, the generated assembler is:
f3:
        push    {lr}
        cmp     r0, #0
        bne     .LCB7
        bl      .L1     @far jump
.LCB7:
        ldr     r3, .L6
        ldr     r3, [r3]
...
        ldr     r3, .L9+976
        ldr     r4, [r3]
        b       .L10
.L11:
        .align  2
.L9:
        .word   g_0_3_7_5
...
        .word   g_0_1
.L10:
.L1:
        pop     {pc}

gcc/testsuite/ChangeLog:

        * gcc.target/arm/thumb1-far-jump-2.c: Force a read of volatile
        memory in macro to avoid optimization.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
---
 gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c 
b/gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c
index 78fcafaaf7d..1cf7a0a86e8 100644
--- a/gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c
+++ b/gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c
@@ -10,7 +10,7 @@ void f3(int i)
 {
 #define GO(n) \
   extern volatile int g_##n; \
-  r4=(int)&g_##n;
+  r4=(int)g_##n;
 
 #define GO8(n) \
   GO(n##_0) \
@@ -54,4 +54,5 @@ void f3(int i)
   }
 }
 
-/* { dg-final { scan-assembler "push.*lr" } } */
+/* { dg-final { scan-assembler "\tpush.*lr" } } */
+/* { dg-final { scan-assembler "\tbl\t\\.L\[0-9\]+\t@far jump" } } */
-- 
2.25.1

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