[PATCH] RISC-V: Fix rvv builtin function groups registration asynchronously.

[KuanLin Chen]

In the origin, cc1 registers rvv builtins with turn on all sub vector
extensions but lto not.  It makes lto use the asynchronous DECL_MD_FUNCTION_CODE
from lto-objects.

Example:
riscv64-unknown-elf-gcc -flto gcc/testsuite/gcc.target/riscv/rvv/base/bug-3.c
-O2 -march=rv64gcv

bug-3.c: In function 'main':
bug-3.c:10:3: error: invalid argument to built-in function
   10 |   __riscv_vse32_v_i32m1 (d, vd, 1);

gcc/ChangeLog:

        * config/riscv/riscv-c.cc
          (riscv_pragma_intrinsic_flags_pollute): Move to
          riscv-vector-builtins.cc
          (riscv_pragma_intrinsic_flags_restore): Ditto
          (riscv_ext_version_value): Remove flags initialization.
        * config/riscv/riscv-vector-builtins.cc:
          (reinit_builtins): Remove handle_pragma_vector in lto_p.
          (riscv_pragma_intrinsic_flags_pollute): Cut from riscv-c.cc.
          (riscv_pragma_intrinsic_flags_restore): Ditto.
          (riscv_vector_push_setting): Backup flags.
          (riscv_vector_pop_setting): Restore flags.
          (handle_pragma_vector): Initialize flags for registering
          builtins.

0002-RISC-V-Fix-rvv-builtin-function-groups-registration-.patch
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