Hi Andre,
> On 2 Oct 2024, at 19:13, Andre Vieira <andre.simoesdiasvie...@arm.com> wrote:
>
> External email: Use caution opening links or attachments
>
>
> As per the AArch64 ISA FEAT_SME does not require FEAT_SVE2, so we are removing
> that false dependency in GCC. However, we chose for now to not support this
> combination of features and will diagnose the combination of FEAT_SME without
> FEAT_SVE2 as unsupported by GCC. We may choose to support this in the future.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-arches.def (SME): Remove SVE2 as prerequisite
> and add in FCMA and F16FML.
> * config/aarch64/aarch64.cc (aarch64_override_options): Diagnose use of
> SME without SVE2.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c:
> Pass +sve2 to existing +sme pragma.
> * gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_single_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/clamp_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/storexn_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c: Likewise.
> ---
> gcc/config/aarch64/aarch64-option-extensions.def | 3 ++-
> gcc/config/aarch64/aarch64.cc | 4 ++++
> .../aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c | 2 +-
> .../aarch64/sve/acle/general-c/binary_opt_single_n_2.c | 2 +-
> .../gcc.target/aarch64/sve/acle/general-c/binary_single_1.c | 2 +-
> .../gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c | 2 +-
> gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c | 2 +-
> .../aarch64/sve/acle/general-c/compare_scalar_count_1.c | 2 +-
> .../aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c | 2 +-
> .../gcc.target/aarch64/sve/acle/general-c/storexn_1.c | 2 +-
> .../aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c | 2 +-
> .../gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c | 2 +-
> .../gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c | 2 +-
> 13 files changed, 17 insertions(+), 12 deletions(-)
>
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 68913beaee2..bc2023da180 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -18998,6 +18998,10 @@ aarch64_override_options (void)
while processing functions with potential target attributes. */
target_option_default_node = target_option_current_node
= build_target_option_node (&global_options, &global_options_set);
+
+ if (TARGET_SME && !TARGET_SVE2)
+ warning (0, "this gcc version does not guarantee full support for +sme"
+ " without +sve2");
}
Beyond my comments on the cover letter, if you do intend to give some message
here anyway, this can be more fancy :)
You can use %qs to quote the +sme and +sve2 strings and I don’t think we
usually refer to GCC itself from warnings.
I think a passive voice would fit better.
Regardless of what we do for the warning this restriction should be documented
in doc/invoke.texi if we end up having it for the GCC 15.1 release.
Thanks,
Kyrill
