On 9/6/24 11:40 AM, Jin Ma wrote:
Since the THeadVector vsetvli does not support vl as an immediate, we
need to convert 0 to zero when outputting asm.

PR target/116592

gcc/ChangeLog:

        * config/riscv/thead.cc (th_asm_output_opcode): Change '0' to
        "zero"

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/xtheadvector/pr116592.c: New test.
I pushed this to the trunk.  Thanks!

jeff

Reply via email to