[PATCH] RISC-V: Fixed incorrect semantic description in DF to DI pattern in the Zfa extension on rv32.

[Jin Ma]

In the process of DF to SI, we generally use "unsigned_fix" rather than
"truncate" for conversion. Although this has no effect in general,
unexpected ICE often occurs when precise semantic analysis is required,
such as analysis in function "simplify_const_unary_operation" in
simplify-rtx.cc.

gcc/ChangeLog:

        * config/riscv/riscv.md: Change "truncate" to "unsigned_fix" for
        the Zfa extension on rv32.
---
 gcc/config/riscv/riscv.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 9f94b5aa0232..36d7b333c456 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2627,7 +2627,7 @@ (define_insn "*movdf_softfloat"
 
 (define_insn "movsidf2_low_rv32"
   [(set (match_operand:SI      0 "register_operand" "=  r")
-       (truncate:SI
+       (unsigned_fix:SI
            (match_operand:DF 1 "register_operand"  "zmvf")))]
   "TARGET_HARD_FLOAT && !TARGET_64BIT && TARGET_ZFA"
   "fmv.x.w\t%0,%1"
@@ -2638,7 +2638,7 @@ (define_insn "movsidf2_low_rv32"
 
 (define_insn "movsidf2_high_rv32"
   [(set (match_operand:SI      0 "register_operand"    "=  r")
-       (truncate:SI
+       (unsigned_fix:SI
             (lshiftrt:DF
                 (match_operand:DF 1 "register_operand" "zmvf")
                 (const_int 32))))]
-- 
2.17.1