On 21 Aug 2024, at 16:03, Richard Sandiford <richard.sandif...@arm.com> wrote: > > External email: Use caution opening links or attachments > > > Kyrylo Tkachov <ktkac...@nvidia.com> writes: >>> On 20 Aug 2024, at 19:11, Richard Sandiford <richard.sandif...@arm.com> >>> wrot>> Jennifer Schmitz <jschm...@nvidia.com> writes: >>>> The param aarch64-autovec-preference=N is a useful tool for testing >>>> auto-vectorisation in GCC as it allows the user to force a particular >>>> strategy. So far, N could be an numerical value between 0 and 4. >>>> This patch adds more user-friendly names to distinguish the options. >>>> For backwards compatibility, the numerical values are retained, but are >>>> made >>>> aliases of the new user-readable strings. >>>> >>>> The patch was bootstrapped and regtested on aarch64-linux-gnu, no >>>> regression. >>>> Ok for mainline? >>> >>> User-readable names are good, but just to check: who is the intended >>> user here? Is it just to save developers/experimenters the effort of >>> having to look up the magic numbers (and yes, I have to do that each >>> time I use it :) )? Or is it for more general users? >>> >>> If this is something that is being recommended for general use, >>> then we should probably promote it from a --param to a full -m option. >>> >>> The difference is that --params are intended to be developer options, >>> so they can be removed or changed without warning. For this reason, >>> if we keep it as a --param, I think we should remove the old numeric >>> values and just go with the symbolic ones. >>> >>> Instead, -m options are intended as user options and are more stable. >>> If an -m option becomes redundant later, we'd probably just turn it into >>> a no-op rather than remove it. >> >> I recommended to Jennifer to keep the old names as aliases because I had >> seem some internal scripts that did some specialist analysis use them and I >> got the impression there may be more such users. >> But those scripts can easily be updated and indeed this is a param that we >> don’t promise to keep it backwards—compatible. >> I’ve been in two minds over whether to keep the old options, I’m okay with >> switching to just the enum values. >> I wouldn’t want to make this an -m* option as I don’t want to see this used >> in production code to override what the compiler should be getting right on >> its own. > > Ah, ok, thanks. In that case I agree we should just keep it as a --param. > I've a slight preference for dropping the numeric arguments, but definitely > no objection to keeping them if that's more convenient. > Dear Kyrill and Richard, Thank you for your feedback. Based on that I made the following changes: - Removed the numerical values as parameter options - Removed the tests testing the numerical inputs - Shortened the enum values by removing _PREFERENCE - Reverted the format of the documentation entry to be a table.
I validated the updated patch, still no regression. Best, Jennifer
0001-PR-target-116365-Add-user-friendly-arguments-to-para.patch
Description: Binary data
> Richard
>
>>
>> Thanks,
>> Kyrill
>>
>>
>>>
>>>>
>>>> Signed-off-by: Jennifer Schmitz <jschm...@nvidia.com>
>>>>
>>>> gcc/
>>>> PR target/116365
>>>> * config/aarch64/aarch64-opts.h
>>>> (enum aarch64_autovec_preference_enum): New enum.
>>>> * config/aarch64/aarch64.cc (aarch64_cmp_autovec_modes):
>>>> Change numerical to enum values.
>>>> (aarch64_autovectorize_vector_modes): Change numerical to enum
>>>> values.
>>>> (aarch64_vector_costs::record_potential_advsimd_unrolling):
>>>> Change numerical to enum values.
>>>> * config/aarch64/aarch64.opt: Change param type to enum.
>>>> * doc/invoke.texi: Update documentation.
>>>>
>>>> gcc/testsuite/
>>>> PR target/116365
>>>> * gcc.target/aarch64/autovec_param_0.c: New test.
>>>> * gcc.target/aarch64/autovec_param_1.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_2.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_3.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_4.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_asimd-only.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_default.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_prefer-asimd.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_prefer-sve.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_sve-only.c: Likewise.
>>>> * gcc.target/aarch64/neoverse_v1_2.c: Update parameter value.
>>>> * gcc.target/aarch64/neoverse_v1_3.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_asrd_1.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_unary_5.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_uxt_5.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_xorsign_2.c: Likewise.
>>>> * gcc.target/aarch64/sve/pr98268-1.c: Likewise.
>>>> * gcc.target/aarch64/sve/pr98268-2.c: Likewise.
>>>>
>>>> From 2e8693143f1c9c0668dea7bad77b3eadac6a4835 Mon Sep 17 00:00:00 2001
>>>> From: Jennifer Schmitz <jschm...@nvidia.com>
>>>> Date: Mon, 19 Aug 2024 08:42:55 -0700
>>>> Subject: [PATCH] PR target/116365: Add user-friendly arguments to --param
>>>> aarch64-autovec-preference=N
>>>>
>>>> The param aarch64-autovec-preference=N is a useful tool for testing
>>>> auto-vectorisation in GCC as it allows the user to force a particular
>>>> strategy. So far, N could be a numerical value between 0 and 4.
>>>> This patch adds more user-friendly names to distinguish the options.
>>>> For backwards compatibility, the numerical values are retained, but are
>>>> made
>>>> aliases of the new user-readable strings.
>>>>
>>>> The patch was bootstrapped and regtested on aarch64-linux-gnu, no
>>>> regression.
>>>> Ok for mainline?
>>>>
>>>> Signed-off-by: Jennifer Schmitz <jschm...@nvidia.com>
>>>>
>>>> gcc/
>>>> PR target/116365
>>>> * config/aarch64/aarch64-opts.h
>>>> (enum aarch64_autovec_preference_enum): New enum.
>>>> * config/aarch64/aarch64.cc (aarch64_cmp_autovec_modes):
>>>> Change numerical to enum values.
>>>> (aarch64_autovectorize_vector_modes): Change numerical to enum
>>>> values.
>>>> (aarch64_vector_costs::record_potential_advsimd_unrolling):
>>>> Change numerical to enum values.
>>>> * config/aarch64/aarch64.opt: Change param type to enum.
>>>> * doc/invoke.texi: Update documentation.
>>>>
>>>> gcc/testsuite/
>>>> PR target/116365
>>>> * gcc.target/aarch64/autovec_param_0.c: New test.
>>>> * gcc.target/aarch64/autovec_param_1.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_2.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_3.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_4.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_asimd-only.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_default.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_prefer-asimd.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_prefer-sve.c: Likewise.
>>>> * gcc.target/aarch64/autovec_param_sve-only.c: Likewise.
>>>> * gcc.target/aarch64/neoverse_v1_2.c: Update parameter value.
>>>> * gcc.target/aarch64/neoverse_v1_3.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_asrd_1.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_unary_5.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_uxt_5.c: Likewise.
>>>> * gcc.target/aarch64/sve/cond_xorsign_2.c: Likewise.
>>>> * gcc.target/aarch64/sve/pr98268-1.c: Likewise.
>>>> * gcc.target/aarch64/sve/pr98268-2.c: Likewise.
>>>> ---
>>>> gcc/config/aarch64/aarch64-opts.h | 17 +++++++++
>>>> gcc/config/aarch64/aarch64.cc | 14 +++----
>>>> gcc/config/aarch64/aarch64.opt | 37 ++++++++++++++++++-
>>>> gcc/doc/invoke.texi | 27 ++++++--------
>>>> .../gcc.target/aarch64/autovec_param_0.c | 4 ++
>>>> .../gcc.target/aarch64/autovec_param_1.c | 4 ++
>>>> .../gcc.target/aarch64/autovec_param_2.c | 4 ++
>>>> .../gcc.target/aarch64/autovec_param_3.c | 4 ++
>>>> .../gcc.target/aarch64/autovec_param_4.c | 4 ++
>>>> .../aarch64/autovec_param_asimd-only.c | 4 ++
>>>> .../aarch64/autovec_param_default.c | 4 ++
>>>> .../aarch64/autovec_param_prefer-asimd.c | 4 ++
>>>> .../aarch64/autovec_param_prefer-sve.c | 4 ++
>>>> .../aarch64/autovec_param_sve-only.c | 4 ++
>>>> .../gcc.target/aarch64/neoverse_v1_2.c | 2 +-
>>>> .../gcc.target/aarch64/neoverse_v1_3.c | 2 +-
>>>> .../gcc.target/aarch64/sve/cond_asrd_1.c | 2 +-
>>>> .../gcc.target/aarch64/sve/cond_cnot_4.c | 2 +-
>>>> .../gcc.target/aarch64/sve/cond_unary_5.c | 2 +-
>>>> .../gcc.target/aarch64/sve/cond_uxt_5.c | 2 +-
>>>> .../gcc.target/aarch64/sve/cond_xorsign_2.c | 2 +-
>>>> .../gcc.target/aarch64/sve/pr98268-1.c | 2 +-
>>>> .../gcc.target/aarch64/sve/pr98268-2.c | 2 +-
>>>> 23 files changed, 120 insertions(+), 33 deletions(-)
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_0.c
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_1.c
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_2.c
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_3.c
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_4.c
>>>> create mode 100644
>>>> gcc/testsuite/gcc.target/aarch64/autovec_param_asimd-only.c
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/autovec_param_default.c
>>>> create mode 100644
>>>> gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-asimd.c
>>>> create mode 100644
>>>> gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-sve.c
>>>> create mode 100644
>>>> gcc/testsuite/gcc.target/aarch64/autovec_param_sve-only.c
>>>>
>>>> diff --git a/gcc/config/aarch64/aarch64-opts.h
>>>> b/gcc/config/aarch64/aarch64-opts.h
>>>> index 80ec1a05253..1567c4baffa 100644
>>>> --- a/gcc/config/aarch64/aarch64-opts.h
>>>> +++ b/gcc/config/aarch64/aarch64-opts.h
>>>> @@ -115,6 +115,23 @@ enum aarch64_key_type {
>>>> AARCH64_KEY_B
>>>> };
>>>>
>>>> +/* An enum for setting the auto-vectorization preference:
>>>> + - AARCH64_AUTOVEC_PREFERENCE_DEFAULT: Use default heuristics
>>>> + - AARCH64_AUTOVEC_PREFERENCE_ASIMD_ONLY: Use only Advanced SIMD (Neon)
>>>> + for auto-vectorisation
>>>> + - AARCH64_AUTOVEC_PREFERENCE_SVE_ONLY: Use only SVE for
>>>> auto-vectorisation
>>>> + - AARCH64_AUTOVEC_PREFERENCE_PREFER_ASIMD: Use both Neon and SVE,
>>>> + but prefer Neon when the costs are equal
>>>> + - AARCH64_AUTOVEC_PREFERENCE_PREFER_SVE: Use both Neon and SVE,
>>>> + but prefer SVE when the costs are equal. */
>>>> +enum aarch64_autovec_preference_enum {
>>>> + AARCH64_AUTOVEC_PREFERENCE_DEFAULT,
>>>> + AARCH64_AUTOVEC_PREFERENCE_ASIMD_ONLY,
>>>> + AARCH64_AUTOVEC_PREFERENCE_SVE_ONLY,
>>>> + AARCH64_AUTOVEC_PREFERENCE_PREFER_ASIMD,
>>>> + AARCH64_AUTOVEC_PREFERENCE_PREFER_SVE
>>>> +};
>>>> +
>>>> /* An enum specifying how to handle load and store pairs using
>>>> a fine-grained policy:
>>>> - LDP_STP_POLICY_DEFAULT: Use the policy defined in the tuning structure.
>>>> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
>>>> index bfd7bcdef7c..fba3abe9856 100644
>>>> --- a/gcc/config/aarch64/aarch64.cc
>>>> +++ b/gcc/config/aarch64/aarch64.cc
>>>> @@ -16404,7 +16404,7 @@ record_potential_advsimd_unrolling (loop_vec_info
>>>> loop_vinfo)
>>>>
>>>> /* Check whether it is possible in principle to use Advanced SIMD
>>>> instead. */
>>>> - if (aarch64_autovec_preference == 2)
>>>> + if (aarch64_autovec_preference == AARCH64_AUTOVEC_PREFERENCE_SVE_ONLY)
>>>> return;
>>>>
>>>> /* We don't want to apply the heuristic to outer loops, since it's
>>>> @@ -22310,8 +22310,8 @@ static bool
>>>> aarch64_cmp_autovec_modes (machine_mode sve_m, machine_mode asimd_m)
>>>> {
>>>> /* Take into account the aarch64-autovec-preference param if non-zero. */
>>>> - bool only_asimd_p = aarch64_autovec_preference == 1;
>>>> - bool only_sve_p = aarch64_autovec_preference == 2;
>>>> + bool only_asimd_p = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_ASIMD_ONLY;
>>>> + bool only_sve_p = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_SVE_ONLY;
>>>>
>>>> if (only_asimd_p)
>>>> return false;
>>>> @@ -22319,8 +22319,8 @@ aarch64_cmp_autovec_modes (machine_mode sve_m,
>>>> machine_mode asimd_m)
>>>> return true;
>>>>
>>>> /* The preference in case of a tie in costs. */
>>>> - bool prefer_asimd = aarch64_autovec_preference == 3;
>>>> - bool prefer_sve = aarch64_autovec_preference == 4;
>>>> + bool prefer_asimd = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_PREFER_ASIMD;
>>>> + bool prefer_sve = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_PREFER_SVE;
>>>>
>>>> poly_int64 nunits_sve = GET_MODE_NUNITS (sve_m);
>>>> poly_int64 nunits_asimd = GET_MODE_NUNITS (asimd_m);
>>>> @@ -22421,8 +22421,8 @@ aarch64_autovectorize_vector_modes (vector_modes
>>>> *modes, bool)
>>>> than an SVE main loop with N bytes then by default we'll try to
>>>> use the SVE loop to vectorize the epilogue instead. */
>>>>
>>>> - bool only_asimd_p = aarch64_autovec_preference == 1;
>>>> - bool only_sve_p = aarch64_autovec_preference == 2;
>>>> + bool only_asimd_p = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_ASIMD_ONLY;
>>>> + bool only_sve_p = aarch64_autovec_preference ==
>>>> AARCH64_AUTOVEC_PREFERENCE_SVE_ONLY;
>>>
>>> Formatting nit, sorry, but: long lines in the three hunks above.
>>> (Alternatively, we could drop "PREFERENCE_" from the enum name,
>>> in which case the lines all fit.)
>>>>
>>>> unsigned int sve_i = (TARGET_SVE && !only_asimd_p) ? 0 : ARRAY_SIZE
>>>> (sve_modes);
>>>> unsigned int advsimd_i = 0;
>>>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
>>>> index 32b772d2a8a..a5c60e6a309 100644
>>>> --- a/gcc/doc/invoke.texi
>>>> +++ b/gcc/doc/invoke.texi
>>>> @@ -17175,22 +17175,17 @@ The precision of division is propotional to this
>>>> param when division
>>>> approximation is enabled. The default value is 2.
>>>>
>>>> @item aarch64-autovec-preference
>>>> -Force an ISA selection strategy for auto-vectorization. Accepts values
>>>> from
>>>> -0 to 4, inclusive.
>>>> -@table @samp
>>>> -@item 0
>>>> -Use the default heuristics.
>>>> -@item 1
>>>> -Use only Advanced SIMD for auto-vectorization.
>>>> -@item 2
>>>> -Use only SVE for auto-vectorization.
>>>> -@item 3
>>>> -Use both Advanced SIMD and SVE. Prefer Advanced SIMD when the costs are
>>>> -deemed equal.
>>>> -@item 4
>>>> -Use both Advanced SIMD and SVE. Prefer SVE when the costs are deemed
>>>> equal.
>>>> -@end table
>>>> -The default value is 0.
>>>> +Force an ISA selection strategy for auto-vectorization.
>>>> +With @option{--param=aarch64-autovec-preference=default}, use the default
>>>> +heuristics.
>>>> +With @option{--param=aarch64-autovec-preference=asimd-only}, use only
>>>> +Advanced SIMD for auto-vectorization.
>>>> +With @option{--param=aarch64-autovec-preference=sve-only}, use only SVE
>>>> +for auto-vectorization.
>>>> +With @option{--param=aarch64-autovec-preference=prefer-asimd}, use both
>>>> +Advanced SIMD and SVE. Prefer Advanced SIMD when the costs are deemed
>>>> equal.
>>>> +With @option{--param=aarch64-autovec-preference=prefer-sve}, use both
>>>> +Advanced SIMD and SVE. Prefer SVE when the costs are deemed equal.
>>>
>>> The table presentation seems more natural to me.
>>>
>>> Thanks,
>>> Richard
>>>
>>>>
>>>> @item aarch64-ldp-policy
>>>> Fine-grained policy for load pairs.
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_0.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_0.c
>>>> new file mode 100644
>>>> index 00000000000..45a2a4c5a6b
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_0.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=0" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_1.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_1.c
>>>> new file mode 100644
>>>> index 00000000000..bf7f7b402a9
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_1.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=1" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_2.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_2.c
>>>> new file mode 100644
>>>> index 00000000000..81d6c19ea9c
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_2.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=2" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_3.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_3.c
>>>> new file mode 100644
>>>> index 00000000000..875eb1ea0d6
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_3.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=3" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_4.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_4.c
>>>> new file mode 100644
>>>> index 00000000000..55ad25fecc4
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_4.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=4" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_asimd-only.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_asimd-only.c
>>>> new file mode 100644
>>>> index 00000000000..c983b26604d
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_asimd-only.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=asimd-only" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_default.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_default.c
>>>> new file mode 100644
>>>> index 00000000000..d02acf17df2
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_default.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=default" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-asimd.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-asimd.c
>>>> new file mode 100644
>>>> index 00000000000..a40d7bdc0d9
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-asimd.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=prefer-asimd" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-sve.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-sve.c
>>>> new file mode 100644
>>>> index 00000000000..b8b995fe969
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_prefer-sve.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=prefer-sve" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/autovec_param_sve-only.c
>>>> b/gcc/testsuite/gcc.target/aarch64/autovec_param_sve-only.c
>>>> new file mode 100644
>>>> index 00000000000..f9c567fa6a5
>>>> --- /dev/null
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/autovec_param_sve-only.c
>>>> @@ -0,0 +1,4 @@
>>>> +/* { dg-options "--param aarch64-autovec-preference=sve-only" } */
>>>> +
>>>> +void
>>>> +foo (void) {}
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/neoverse_v1_2.c
>>>> b/gcc/testsuite/gcc.target/aarch64/neoverse_v1_2.c
>>>> index 45d7e81c78e..c95fd463ebf 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/neoverse_v1_2.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/neoverse_v1_2.c
>>>> @@ -1,4 +1,4 @@
>>>> -/* { dg-options "-O2 -mcpu=neoverse-v1 --param
>>>> aarch64-autovec-preference=1 -fdump-tree-vect-details" } */
>>>> +/* { dg-options "-O2 -mcpu=neoverse-v1 --param
>>>> aarch64-autovec-preference=asimd-only -fdump-tree-vect-details" } */
>>>>
>>>> void
>>>> f (float x[restrict][100], float y[restrict][100])
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/neoverse_v1_3.c
>>>> b/gcc/testsuite/gcc.target/aarch64/neoverse_v1_3.c
>>>> index de31fc13b28..f5c94969bf3 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/neoverse_v1_3.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/neoverse_v1_3.c
>>>> @@ -1,4 +1,4 @@
>>>> -/* { dg-options "-O2 -mcpu=neoverse-v1 --param
>>>> aarch64-autovec-preference=2 -fdump-tree-vect-details" } */
>>>> +/* { dg-options "-O2 -mcpu=neoverse-v1 --param
>>>> aarch64-autovec-preference=sve-only -fdump-tree-vect-details" } */
>>>>
>>>> void
>>>> f (float x[restrict][100], float y[restrict][100])
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c
>>>> index 96e99353601..9e14bc68e05 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_asrd_1.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=2" } */
>>>> +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=sve-only" } */
>>>>
>>>> #include <stdint.h>
>>>>
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c
>>>> index 6f969a82942..cc2363cad29 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_cnot_4.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=2" } */
>>>> +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=sve-only" } */
>>>>
>>>> #include <stdint.h>
>>>>
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c
>>>> index e6ec5157cd6..078318e8d26 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=2" } */
>>>> +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=sve-only" } */
>>>>
>>>> #include <stdint.h>
>>>>
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c
>>>> index 7ed35921b6f..0b0984743c8 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_uxt_5.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=2" } */
>>>> +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=256
>>>> --param=aarch64-autovec-preference=sve-only" } */
>>>>
>>>> #include <stdint.h>
>>>>
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_xorsign_2.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/cond_xorsign_2.c
>>>> index 274dd0ede59..20ec97040bd 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/cond_xorsign_2.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_xorsign_2.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O2 -msve-vector-bits=128 --param
>>>> aarch64-autovec-preference=2" } */
>>>> +/* { dg-options "-O2 -msve-vector-bits=128 --param
>>>> aarch64-autovec-preference=sve-only" } */
>>>>
>>>> #include "cond_xorsign_1.c"
>>>>
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr98268-1.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/pr98268-1.c
>>>> index fdbe55e0b4e..9b160990ddb 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/pr98268-1.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/pr98268-1.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do link } */
>>>> -/* { dg-options "-flto -O -ftree-vectorize
>>>> --param=aarch64-autovec-preference=3" } */
>>>> +/* { dg-options "-flto -O -ftree-vectorize
>>>> --param=aarch64-autovec-preference=prefer-asimd" } */
>>>> /* { dg-additional-sources "pr98268-2.c" } */
>>>>
>>>> short d, e;
>>>> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr98268-2.c
>>>> b/gcc/testsuite/gcc.target/aarch64/sve/pr98268-2.c
>>>> index de3b05d5e15..59cea967bbd 100644
>>>> --- a/gcc/testsuite/gcc.target/aarch64/sve/pr98268-2.c
>>>> +++ b/gcc/testsuite/gcc.target/aarch64/sve/pr98268-2.c
>>>> @@ -1,5 +1,5 @@
>>>> /* { dg-do compile } */
>>>> -/* { dg-options "-O -ftree-vectorize
>>>> --param=aarch64-autovec-preference=3" } */
>>>> +/* { dg-options "-O -ftree-vectorize
>>>> --param=aarch64-autovec-preference=prefer-asimd" } */
>>>>
>>>> extern short d[], e[];
>>>> void f(char a, long *b) {
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