LGTM, but...this seems to have discovered another bug in the current
trunk? could you take a look?
Will trigger by -O2 -march=rv64gcv_zvl512b -mabi=lp64d or -O2
-march=rv64gcv_zvl256b -mabi=lp64d
during RTL pass: combine
x.c: In function '__libc_mallinfo':
x.c:47:1: internal compiler error: in smallest_mode_for_size, at
stor-layout.cc:356
47 | }
| ^
0x2dc82e2 internal_error(char const*, ...)
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/diagnostic-global-context.cc:491
0xc8fdfe fancy_abort(char const*, int, char const*)
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/diagnostic.cc:1725
0x13bf6b7 smallest_mode_for_size(poly_int<2u, unsigned long>, mode_class)
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/stor-layout.cc:356
0x126efea smallest_int_mode_for_size(poly_int<2u, unsigned long>)
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/machmode.h:916
0x126efea get_best_extraction_insn
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs-query.cc:208
0x269ac14 make_extraction
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:7779
0x269beff make_compound_operation_int
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:8186
0x269cf3f make_compound_operation(rtx_def*, rtx_code)
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:8471
0x26a0c8e simplify_set
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:6975
0x26a0c8e combine_simplify_rtx
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:6374
0x26a2f2f subst
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:5630
0x26a6fc1 try_combine
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:3312
0x26ac211 combine_instructions
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:1264
0x26ac211 rest_of_handle_combine
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:15127
0x26ac211 execute
../../../../riscv-gnu-toolchain-trunk/gcc/gcc/combine.cc:15171
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
On Fri, Jul 12, 2024 at 8:48 AM Li Xu <xu...@eswincomputing.com> wrote:
>
> From: xuli <xu...@eswincomputing.com>
>
> The reason is that in the following code, icode = movmisalignv8si has
> already been rejected by TARGET_VECTOR_MISALIGN_SUPPORTED, but it is
> allowed by targetm.slow_unaligned_access,which is contradictory.
>
> (((icode = optab_handler (movmisalign_optab, mode))
> != CODE_FOR_nothing)
> || targetm.slow_unaligned_access (mode, align))
>
> misaligned vector access should be enabled by -mno-vector-strict-align option.
>
> PR Target/115862
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_slow_unaligned_access): Disable vector
> misalign.
>
> Signed-off-by: Li Xu <xu...@eswincomputing.com>
> ---
> gcc/config/riscv/riscv.cc | 5 +-
> .../gcc.target/riscv/rvv/base/pr115862.c | 52 +++++++++++++++++++
> 2 files changed, 55 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115862.c
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 61fa74e9322..16b210f323e 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -10269,9 +10269,10 @@ riscv_cannot_copy_insn_p (rtx_insn *insn)
> /* Implement TARGET_SLOW_UNALIGNED_ACCESS. */
>
> static bool
> -riscv_slow_unaligned_access (machine_mode, unsigned int)
> +riscv_slow_unaligned_access (machine_mode mode, unsigned int)
> {
> - return riscv_slow_unaligned_access_p;
> + return VECTOR_MODE_P (mode) ? TARGET_VECTOR_MISALIGN_SUPPORTED
> + : riscv_slow_unaligned_access_p;
> }
>
> static bool
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr115862.c
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115862.c
> new file mode 100644
> index 00000000000..3cbc3c3a0ea
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115862.c
> @@ -0,0 +1,52 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -march=rv64gcv_zvl512b -mabi=lp64d" } */
> +
> +struct mallinfo2
> +{
> + int arena;
> + int ordblks;
> + int smblks;
> + int hblks;
> + int hblkhd;
> + int usmblks;
> + int fsmblks;
> + int uordblks;
> + int fordblks;
> + int keepcost;
> +};
> +
> +struct mallinfo
> +{
> + int arena;
> + int ordblks;
> + int smblks;
> + int hblks;
> + int hblkhd;
> + int usmblks;
> + int fsmblks;
> + int uordblks;
> + int fordblks;
> + int keepcost;
> +};
> +
> +struct mallinfo
> +__libc_mallinfo (void)
> +{
> + struct mallinfo m;
> + struct mallinfo2 m2;
> +
> + m.arena = m2.arena;
> + m.ordblks = m2.ordblks;
> + m.smblks = m2.smblks;
> + m.hblks = m2.hblks;
> + m.hblkhd = m2.hblkhd;
> + m.usmblks = m2.usmblks;
> + m.fsmblks = m2.fsmblks;
> + m.uordblks = m2.uordblks;
> + m.fordblks = m2.fordblks;
> + m.keepcost = m2.keepcost;
> +
> + return m;
> +}
> +
> +/* { dg-final { scan-assembler {vle32\.v} } } */
> --
> 2.17.1
>
