On Mon, Jul 8, 2024 at 8:24 AM Kewen.Lin <li...@linux.ibm.com> wrote:
>
> Hi,
>
> As PR114189 shows, middle-end will obsolete vcond, vcondu
> and vcondeq optabs soon. This patch is to remove all
> vcond{,u} expanders in rs6000 port and adjust the function
> rs6000_emit_vector_cond_expr which is called by those
> expanders as static.
>
> Bootstrapped and regtested on powerpc64-linux-gnu P8/P9 and
> powerpc64le-linux-gnu P9 and P10.
>
> I'm going to push this later this week if no objections.
Thanks a lot for doing this!
Richard.
> BR,
> Kewen
> -----
>
> gcc/ChangeLog:
>
> * config/rs6000/rs6000-protos.h (rs6000_emit_vector_cond_expr):
> Remove.
> * config/rs6000/rs6000.cc (rs6000_emit_vector_cond_expr): Add static
> qualifier as it is only called by rs6000_emit_swsqrt now.
> * config/rs6000/vector.md (vcond<VEC_F:mode><VEC_F:mode>): Remove.
> (vcond<VEC_I:mode><VEC_I:mode>): Remove.
> (vcondv4sfv4si): Likewise.
> (vcondv4siv4sf): Likewise.
> (vcondv2dfv2di): Likewise.
> (vcondv2div2df): Likewise.
> (vcondu<VEC_I:mode><VEC_I:mode>): Likewise.
> (vconduv4sfv4si): Likewise.
> (vconduv2dfv2di): Likewise.
> ---
> gcc/config/rs6000/rs6000-protos.h | 1 -
> gcc/config/rs6000/rs6000.cc | 2 +-
> gcc/config/rs6000/vector.md | 160 ------------------------------
> 3 files changed, 1 insertion(+), 162 deletions(-)
>
> diff --git a/gcc/config/rs6000/rs6000-protos.h
> b/gcc/config/rs6000/rs6000-protos.h
> index 09a57a806fa..b40557a8557 100644
> --- a/gcc/config/rs6000/rs6000-protos.h
> +++ b/gcc/config/rs6000/rs6000-protos.h
> @@ -126,7 +126,6 @@ extern void rs6000_emit_dot_insn (rtx dst, rtx src, int
> dot, rtx ccreg);
> extern bool rs6000_emit_set_const (rtx, rtx);
> extern bool rs6000_emit_cmove (rtx, rtx, rtx, rtx);
> extern bool rs6000_emit_int_cmove (rtx, rtx, rtx, rtx);
> -extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx);
> extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx);
> extern void rs6000_expand_atomic_compare_and_swap (rtx op[]);
> extern rtx swap_endian_selector_for_mode (machine_mode mode);
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index 58553ff66f4..24044f3a558 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -16145,7 +16145,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode,
> OP_FALSE are two VEC_COND_EXPR operands. CC_OP0 and CC_OP1 are the two
> operands for the relation operation COND. */
>
> -int
> +static int
> rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, rtx op_false,
> rtx cond, rtx cc_op0, rtx cc_op1)
> {
> diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md
> index 59489e06839..0d3e0a24e11 100644
> --- a/gcc/config/rs6000/vector.md
> +++ b/gcc/config/rs6000/vector.md
> @@ -331,166 +331,6 @@ (define_expand "vector_copysign<mode>3"
> })
>
>
>
> -;; Vector comparisons
> -(define_expand "vcond<mode><mode>"
> - [(set (match_operand:VEC_F 0 "vfloat_operand")
> - (if_then_else:VEC_F
> - (match_operator 3 "comparison_operator"
> - [(match_operand:VEC_F 4 "vfloat_operand")
> - (match_operand:VEC_F 5 "vfloat_operand")])
> - (match_operand:VEC_F 1 "vfloat_operand")
> - (match_operand:VEC_F 2 "vfloat_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcond<mode><mode>"
> - [(set (match_operand:VEC_I 0 "vint_operand")
> - (if_then_else:VEC_I
> - (match_operator 3 "comparison_operator"
> - [(match_operand:VEC_I 4 "vint_operand")
> - (match_operand:VEC_I 5 "vint_operand")])
> - (match_operand:VEC_I 1 "vector_int_reg_or_same_bit")
> - (match_operand:VEC_I 2 "vector_int_reg_or_same_bit")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcondv4sfv4si"
> - [(set (match_operand:V4SF 0 "vfloat_operand")
> - (if_then_else:V4SF
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V4SI 4 "vint_operand")
> - (match_operand:V4SI 5 "vint_operand")])
> - (match_operand:V4SF 1 "vfloat_operand")
> - (match_operand:V4SF 2 "vfloat_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
> - && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcondv4siv4sf"
> - [(set (match_operand:V4SI 0 "vint_operand")
> - (if_then_else:V4SI
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V4SF 4 "vfloat_operand")
> - (match_operand:V4SF 5 "vfloat_operand")])
> - (match_operand:V4SI 1 "vint_operand")
> - (match_operand:V4SI 2 "vint_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
> - && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcondv2dfv2di"
> - [(set (match_operand:V2DF 0 "vfloat_operand")
> - (if_then_else:V2DF
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V2DI 4 "vint_operand")
> - (match_operand:V2DI 5 "vint_operand")])
> - (match_operand:V2DF 1 "vfloat_operand")
> - (match_operand:V2DF 2 "vfloat_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)
> - && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcondv2div2df"
> - [(set (match_operand:V2DI 0 "vint_operand")
> - (if_then_else:V2DI
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V2DF 4 "vfloat_operand")
> - (match_operand:V2DF 5 "vfloat_operand")])
> - (match_operand:V2DI 1 "vint_operand")
> - (match_operand:V2DI 2 "vint_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)
> - && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vcondu<mode><mode>"
> - [(set (match_operand:VEC_I 0 "vint_operand")
> - (if_then_else:VEC_I
> - (match_operator 3 "comparison_operator"
> - [(match_operand:VEC_I 4 "vint_operand")
> - (match_operand:VEC_I 5 "vint_operand")])
> - (match_operand:VEC_I 1 "vector_int_reg_or_same_bit")
> - (match_operand:VEC_I 2 "vector_int_reg_or_same_bit")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vconduv4sfv4si"
> - [(set (match_operand:V4SF 0 "vfloat_operand")
> - (if_then_else:V4SF
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V4SI 4 "vint_operand")
> - (match_operand:V4SI 5 "vint_operand")])
> - (match_operand:V4SF 1 "vfloat_operand")
> - (match_operand:V4SF 2 "vfloat_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
> - && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> -(define_expand "vconduv2dfv2di"
> - [(set (match_operand:V2DF 0 "vfloat_operand")
> - (if_then_else:V2DF
> - (match_operator 3 "comparison_operator"
> - [(match_operand:V2DI 4 "vint_operand")
> - (match_operand:V2DI 5 "vint_operand")])
> - (match_operand:V2DF 1 "vfloat_operand")
> - (match_operand:V2DF 2 "vfloat_operand")))]
> - "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)
> - && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DImode)"
> -{
> - if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
> - operands[3], operands[4], operands[5]))
> - DONE;
> - else
> - gcc_unreachable ();
> -})
> -
> ;; To support vector condition vectorization, define vcond_mask and vec_cmp.
>
> ;; Same mode for condition true/false values and predicate operand.
> --
> 2.39.1
