LGTM, BTW, based on the discussion[1], my understanding is: depend <ext> == require <ext> == imply <ext> for the RISC-V ISA spec. [1] https://github.com/riscv/riscv-v-spec/issues/723#issuecomment-922153867
On Wed, Jul 3, 2024 at 9:21 AM Patrick O'Neill <patr...@rivosinc.com> wrote: > From: Palmer Dabbelt <pal...@rivosinc.com> > > gcc/ChangeLog: > > * doc/invoke.texi: Describe -march behavior for dependent > extensions on > RISC-V. > --- > Ok'd by Jeff Law here: > https://inbox.sourceware.org/gcc-patches/fae68675-519f-4d80-b0fb-dfd5d8a22...@gmail.com/ > I'll let it sit on the lists overnight and commit in the morning tomorrow > (PST timezone). > --- > gcc/doc/invoke.texi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index 68ebd79d676..1181ee2de14 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -31063,6 +31063,10 @@ If both @option{-march} and @option{-mcpu=} are > not specified, the default for > this argument is system dependent, users who want a specific architecture > extensions should specify one explicitly. > > +When the RISC-V specifications define an extension as depending on other > +extensions, GCC will implicitly add the dependent extensions to the > enabled > +extension set if they weren't added explicitly. > + > @opindex mcpu > @item -mcpu=@var{processor-string} > Use architecture of and optimize the output for the given processor, > specified > -- > 2.43.2 > >
