On Wed, Jun 19, 2024 at 5:04 AM Roger Sayle <ro...@nextmovesoftware.com> wrote:
>
>
> This patch tweaks ix86_ternlog_idx to allow any SUBREG that matches
> the register_operand predicate, and is split out as an independent
> piece of a patch that I have to clean-up redundant ternlog patterns
> in sse.md. It turns out that some of these patterns aren't (yet)
> sufficiently redundant to be obsolete. The problem is that the
> "new" ternlog pattern has the restriction that it allows SUBREGs,
> but only those where the inner and outer modes are the same size,
> where regular patterns use "register_operand" which allows arbitrary
> (including paradoxical) SUBREGs.
>
> A motivating example is f2 in gcc.target/i386/avx512dq-abs-copysign-1.c
>
> void f2 (float x, float y)
> {
> register float a __asm ("xmm16"), b __asm ("xmm17");
> a = x;
> b = y;
> asm volatile ("" : "+v" (a), "+v" (b));
> a = __builtin_copysignf (a, b);
> asm volatile ("" : "+v" (a));
> }
>
> for which combine tries:
>
> (set (subreg:V4SF (reg:SF 100 [ _3 ]) 0)
> (ior:V4SF (and:V4SF (not:V4SF (reg:V4SF 104))
> (subreg:V4SF (reg:SF 110) 0))
> (reg:V4SF 106)))
>
> where the SUBREG is paradoxical, with inner mode SF and outer mode V4SF.
> This patch allows the recently added ternlog_operand to accept this case.
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k check, both with and without --target_board=unix{-m32}
> with no new failures. Ok for mainline?
Ok.
>
>
> 2024-06-18 Roger Sayle <ro...@nextmovesoftware.com>
>
> gcc/ChangeLog
> * config/i386/i386-expand.cc (ix86_ternlog_idx): Allow any SUBREG
> that matches register_operand. Use rtx_equal_p to compare REG
> or SUBREG "leaf" operands.
>
>
> Thanks in advance,
> Roger
> --
>
--
BR,
Hongtao
