[x86 PATCH] PR target/115397: AVX512 ternlog vs. -m32 -fPIC constant pool.

[Roger Sayle]

This patch fixes PR target/115397, a recent regression caused by my
ternlog patch that results in an ICE (building numpy) with -m32 -fPIC.
The problem is that ix86_broadcast_from_constant, which calls
get_pool_constant, doesn't handle the UNSPEC_GOTOFF that's created by
calling validize_mem when using -fPIC on i686.  The logic here is a bit
convoluted (and my future patches will clean some of this up), but the
simplest fix is to call ix86_broadcast_from_constant between the calls
to force_const_mem and the call to validize_mem.

Perhaps a better solution might be to call targetm.delegitimize_address
from the middle-end's get_pool_constant, but ultimately the best approach
would be to not place things in the constant pool if we don't need to.
My plans to move (broadcast) constant handling from expand to split1
should simplify this.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?


2024-06-10  Roger Sayle  <ro...@nextmovesoftware.com>

gcc/ChangeLog
        PR target/115397
        * config/i386/i386-expand.cc (ix86_expand_ternlog): Move call to
        ix86_broadcast_from_constant before call to validize_mem, but after
        call to force_const_mem.

gcc/testsuite/ChangeLog
        PR target/115397
        * gcc.target/i386/pr115397.c: New test case.


Thanks in advance (and sorry for any inconvenience),
Roger


diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 9b60264..312329e 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -26041,8 +26041,9 @@ ix86_expand_ternlog (machine_mode mode, rtx op0, rtx 
op1, rtx op2, int idx,
       tmp2 = ix86_gen_bcst_mem (mode, op2);
       if (!tmp2)
        {
-         tmp2 = validize_mem (force_const_mem (mode, op2));
+         tmp2 = force_const_mem (mode, op2);
          rtx bcast = ix86_broadcast_from_constant (mode, tmp2);
+         tmp2 = validize_mem (tmp2);
          if (bcast)
            {
              rtx reg2 = gen_reg_rtx (mode);
diff --git a/gcc/testsuite/gcc.target/i386/pr115397.c 
b/gcc/testsuite/gcc.target/i386/pr115397.c
new file mode 100644
index 0000000..2783578
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr115397.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-fPIC -mavx512f -O3" } */
+
+int LONG_divide_AVX512F_dimensions_0;
+void npy_set_floatstatus_overflow();
+void LONG_divide_AVX512F() {
+  long *src;
+  int raise_err = 0;
+  for (; LONG_divide_AVX512F_dimensions_0;
+       --LONG_divide_AVX512F_dimensions_0, ++src) {
+    long a = *src;
+    if (a)
+      raise_err = 1;
+  }
+  if (raise_err)
+    npy_set_floatstatus_overflow();
+}