Applied this patch as proposed by Richard.
Johann
--
AVR: tree-optimization/115307 - Work around isinf bloat from early passes.
PR tree-optimization/115307
gcc/
* config/avr/avr.md (SFDF): New mode iterator.
(isinf<mode>2) [sf, df]: New expanders.
gcc/testsuite/
* gcc.target/avr/torture/pr115307-isinf.c: New test.
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index d4fcff46123..75d35d5e14b 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -292,6 +292,8 @@ (define_mode_iterator ORDERED234 [HI SI PSI
(define_mode_iterator SPLIT34 [SI SF PSI
SQ USQ SA USA])
+(define_mode_iterator SFDF [SF DF])
+
;; Where the most significant bit is located.
(define_mode_attr MSB [(QI "7") (QQ "7") (UQQ "7")
(HI "15") (HQ "15") (UHQ "15") (HA "15") (UHA
"15")
@@ -10047,6 +10049,20 @@ (define_insn_and_split "*extract.subreg.bit"
(const_int 1)
(match_dup 2)))])
+
+;; Work around PR115307: Early passes expand isinf/f/l to a bloat.
+;; These passes do not consider costs, and there is no way to
+;; hook in or otherwise disable the generated bloat.
+
+;; isinfsf2 isinfdf2
+(define_expand "isinf<mode>2"
+ [(parallel [(match_operand:HI 0)
+ (match_operand:SFDF 1)])]
+ ""
+ {
+ FAIL;
+ })
+
^L
;; Fixed-point instructions
(include "avr-fixed.md")
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr115307-isinf.c
b/gcc/testsuite/gcc.target/avr/torture/pr115307-isinf.c
new file mode 100644
index 00000000000..6368bd205c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/torture/pr115307-isinf.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+
+int call_isinff (float f)
+{
+ int isinff (float);
+ return isinff (f);
+}
+
+int call_isinf (double f)
+{
+ int isinf (double);
+ return isinf (f);
+}
+
+int call_isinfl (long double f)
+{
+ int isinfl (long double);
+ return isinfl (f);
+}
+
+/* { dg-final { scan-assembler-not "unord" } } */
