On Mon, Feb 5, 2024 at 2:56 AM Uros Bizjak <ubiz...@gmail.com> wrote:
>
> On Fri, Feb 2, 2024 at 11:47 PM H.J. Lu <hjl.to...@gmail.com> wrote:
> >
> > Changes in v5:
> >
> > 1. Add pr113689-3.c.
> > 2. Use %r10 if ix86_profile_before_prologue () return true.
> > 3. Try a callee-saved register which has been saved on stack in the
> > prologue.
> >
> > Changes in v4:
> >
> > 1. Remove pr113689-3.c.
> > 2. Use df_get_live_out.
> >
> > Changes in v3:
> >
> > 1. Remove r10_ok.
> >
> > Changes in v2:
> >
> > 1. Add int_parameter_registers to machine_function to track integer
> > registers used for parameter passing.
> > 2. Update x86_64_select_profile_regnum to try %r10 first and use an
> > caller-saved register, which isn't used for parameter passing.
> >
> > ---
> > 2 scratch registers, %r10 and %r11, are available at function entry for
> > large model profiling. But %r10 may be used by stack realignment and we
> > can't use %r10 in this case. Add x86_64_select_profile_regnum to find
> > a caller-saved register which isn't live or a callee-saved register
> > which has been saved on stack in the prologue at entry for large model
> > profiling and sorry if we can't find one.
> >
> > gcc/
> >
> > PR target/113689
> > * config/i386/i386.cc (set_saved_int_registers_bit): New.
> > (test_saved_int_registers_bit): Likewise.
> > (ix86_emit_save_regs): Call set_saved_int_registers_bit on
> > saved register.
> > (ix86_emit_save_regs_using_mov): Likewise.
> > (x86_64_select_profile_regnum): New.
> > (x86_function_profiler): Call x86_64_select_profile_regnum to
> > get a scratch register for large model profiling.
> > * config/i386/i386.h (machine_function): Add
> > saved_int_registers.
> >
> > gcc/testsuite/
> >
> > PR target/113689
> > * gcc.target/i386/pr113689-1.c: New file.
> > * gcc.target/i386/pr113689-2.c: Likewise.
> > * gcc.target/i386/pr113689-3.c: Likewise.
> > ---
> > gcc/config/i386/i386.cc | 119 ++++++++++++++++++---
> > gcc/config/i386/i386.h | 5 +
> > gcc/testsuite/gcc.target/i386/pr113689-1.c | 49 +++++++++
> > gcc/testsuite/gcc.target/i386/pr113689-2.c | 41 +++++++
> > gcc/testsuite/gcc.target/i386/pr113689-3.c | 48 +++++++++
> > 5 files changed, 247 insertions(+), 15 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr113689-1.c
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr113689-2.c
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr113689-3.c
> >
> > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> > index b3e7c74846e..1c7aaa4535e 100644
> > --- a/gcc/config/i386/i386.cc
> > +++ b/gcc/config/i386/i386.cc
> > @@ -7387,6 +7387,32 @@ choose_baseaddr (HOST_WIDE_INT cfa_offset, unsigned
> > int *align,
> > return plus_constant (Pmode, base_reg, base_offset);
> > }
> >
> > +/* Set the integer register REGNO bit in saved_int_registers. */
> > +
> > +static void
> > +set_saved_int_registers_bit (int regno)
> > +{
> > + if (LEGACY_INT_REGNO_P (regno))
> > + cfun->machine->saved_int_registers |= 1 << regno;
> > + else
> > + cfun->machine->saved_int_registers
> > + |= 1 << (regno - FIRST_REX_INT_REG + 8);
> > +}
> > +
> > +/* Return true if the integer register REGNO bit in saved_int_registers
> > + is set. */
> > +
> > +static bool
> > +test_saved_int_registers_bit (int regno)
> > +{
> > + if (LEGACY_INT_REGNO_P (regno))
> > + return (cfun->machine->saved_int_registers
> > + & (1 << regno)) != 0;
> > + else
> > + return (cfun->machine->saved_int_registers
> > + & (1 << (regno - FIRST_REX_INT_REG + 8))) != 0;
> > +}
> > +
> > /* Emit code to save registers in the prologue. */
> >
> > static void
> > @@ -7403,6 +7429,7 @@ ix86_emit_save_regs (void)
> > insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno),
> > TARGET_APX_PPX));
> > RTX_FRAME_RELATED_P (insn) = 1;
> > + set_saved_int_registers_bit (regno);
> > }
> > }
> > else
> > @@ -7415,6 +7442,7 @@ ix86_emit_save_regs (void)
> > for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; regno--)
> > if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true))
> > {
> > + set_saved_int_registers_bit (regno);
> > if (aligned)
> > {
> > regno_list[loaded_regnum++] = regno;
> > @@ -7567,6 +7595,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT
> > cfa_offset)
> > {
> > ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset);
> > cfa_offset -= UNITS_PER_WORD;
> > + set_saved_int_registers_bit (regno);
> > }
> > }
>
> Do we really need the above handling? I think that we can use
> ix86_save_reg directly in x86_64_select_profile_regnum below.
Fixed in v6.
> > @@ -22749,6 +22778,48 @@ current_fentry_section (const char **name)
> > return true;
> > }
> >
> > +/* Return a caller-saved register which isn't live or a callee-saved
> > + register which has been saved on stack in the prologue at entry for
> > + profile. */
> > +
> > +static int
> > +x86_64_select_profile_regnum (bool r11_ok ATTRIBUTE_UNUSED)
> > +{
> > + /* Use %r10 if the profiler is emitted before the prologue or it isn't
> > + used by DRAP. */
> > + if (ix86_profile_before_prologue ()
> > + || !crtl->drap_reg
> > + || REGNO (crtl->drap_reg) != R10_REG)
> > + return R10_REG;
> > +
> > + /* The profiler is emitted after the prologue. If there is a
> > + caller-saved register which isn't live or a callee-saved
> > + register saved on stack in the prologue, use it. */
> > +
> > + bitmap reg_live = df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun));
> > +
> > + int i;
> > + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
> > + if (GENERAL_REGNO_P (i)
> > + && i != R10_REG
> > +#ifdef NO_PROFILE_COUNTERS
> > + && (r11_ok || i != R11_REG)
> > +#else
> > + && i != R11_REG
> > +#endif
> > + && (!REX2_INT_REGNO_P (i) || TARGET_APX_EGPR)
> > + && !fixed_regs[i]
> > + && (test_saved_int_registers_bit (i)
> > + || (call_used_regs[i]
> > + && !REGNO_REG_SET_P (reg_live, i))))
> > + return i;
>
> We are scanning the whole hard reg space, so we can use ix86_save_reg
> here instead of introducing test_saved_int_registers_bit array. Also,
> you can use accessible_reg_set to determine which general register set
> is available.
Fixed in v6.
> > +
> > + sorry ("no register available for profiling %<-mcmodel=large%s%>",
> > + ix86_cmodel == CM_LARGE_PIC ? " -fPIC" : "");
> > +
> > + return INVALID_REGNUM;
> > +}
> > +
> > /* Output assembler code to FILE to increment profiler label # LABELNO
> > for profiling a function entry. */
> > void
> > @@ -22783,42 +22854,60 @@ x86_function_profiler (FILE *file, int labelno
> > ATTRIBUTE_UNUSED)
> > fprintf (file, "\tleaq\t%sP%d(%%rip), %%r11\n", LPREFIX, labelno);
> > #endif
> >
> > + int scratch;
> > + const char *reg_prefix;
> > + const char *reg;
> > +
> > if (!TARGET_PECOFF)
> > {
> > switch (ix86_cmodel)
> > {
> > case CM_LARGE:
> > - /* NB: R10 is caller-saved. Although it can be used as a
> > - static chain register, it is preserved when calling
> > - mcount for nested functions. */
> > + scratch = x86_64_select_profile_regnum (true);
> > + reg = hi_reg_name[scratch];
> > + reg_prefix = LEGACY_INT_REGNO_P (scratch) ? "r" : "";
>
> Oh... please rather construct a complete reg name here and avoid using
> reg_prefix below.
Fixed in v6.
> > if (ASSEMBLER_DIALECT == ASM_INTEL)
> > - fprintf (file, "1:\tmovabs\tr10, OFFSET FLAT:%s\n"
> > - "\tcall\tr10\n", mcount_name);
> > + fprintf (file,
> > + "1:\tmovabs\t%s%s, OFFSET FLAT:%s\n"
> > + "\tcall\t%s%s\n",
> > + reg_prefix, reg, mcount_name, reg_prefix, reg);
> > else
> > - fprintf (file, "1:\tmovabsq\t$%s, %%r10\n\tcall\t*%%r10\n",
> > - mcount_name);
> > + fprintf (file,
> > + "1:\tmovabsq\t$%s, %%%s%s\n\tcall\t*%%%s%s\n",
> > + mcount_name, reg_prefix, reg, reg_prefix, reg);
> > break;
> > case CM_LARGE_PIC:
> > #ifdef NO_PROFILE_COUNTERS
> > + scratch = x86_64_select_profile_regnum (false);
> > + reg = hi_reg_name[scratch];
> > + reg_prefix = LEGACY_INT_REGNO_P (scratch) ? "r" : "";
>
> Also here, please construct a complete reg name here.
Fixed in v6.
https://patchwork.sourceware.org/project/gcc/list/?series=30610
Thanks.
> Uros.
>
> > if (ASSEMBLER_DIALECT == ASM_INTEL)
> > {
> > fprintf (file, "1:movabs\tr11, "
> > "OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-1b\n");
> > - fprintf (file, "\tlea\tr10, 1b[rip]\n");
> > - fprintf (file, "\tadd\tr10, r11\n");
> > + fprintf (file, "\tlea\t%s%s, 1b[rip]\n",
> > + reg_prefix, reg);
> > + fprintf (file, "\tadd\t%s%s, r11\n",
> > + reg_prefix, reg);
> > fprintf (file, "\tmovabs\tr11, OFFSET FLAT:%s@PLTOFF\n",
> > mcount_name);
> > - fprintf (file, "\tadd\tr10, r11\n");
> > - fprintf (file, "\tcall\tr10\n");
> > + fprintf (file, "\tadd\t%s%s, r11\n",
> > + reg_prefix, reg);
> > + fprintf (file, "\tcall\t%s%s\n",
> > + reg_prefix, reg);
> > break;
> > }
> > fprintf (file,
> > "1:\tmovabsq\t$_GLOBAL_OFFSET_TABLE_-1b, %%r11\n");
> > - fprintf (file, "\tleaq\t1b(%%rip), %%r10\n");
> > - fprintf (file, "\taddq\t%%r11, %%r10\n");
> > + fprintf (file, "\tleaq\t1b(%%rip), %%%s%s\n",
> > + reg_prefix, reg);
> > + fprintf (file, "\taddq\t%%r11, %%%s%s\n",
> > + reg_prefix, reg);
> > fprintf (file, "\tmovabsq\t$%s@PLTOFF, %%r11\n", mcount_name);
> > - fprintf (file, "\taddq\t%%r11, %%r10\n");
> > - fprintf (file, "\tcall\t*%%r10\n");
> > + fprintf (file, "\taddq\t%%r11, %%%s%s\n",
> > + reg_prefix, reg);
> > + fprintf (file, "\tcall\t*%%%s%s\n",
> > + reg_prefix, reg);
> > #else
> > sorry ("profiling %<-mcmodel=large%> with PIC is not
> > supported");
> > #endif
> > diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> > index 35ce8b00d36..33821a04074 100644
> > --- a/gcc/config/i386/i386.h
> > +++ b/gcc/config/i386/i386.h
> > @@ -2847,6 +2847,11 @@ struct GTY(()) machine_function {
> > /* True if red zone is used. */
> > BOOL_BITFIELD red_zone_used : 1;
> >
> > + /* Bit mask for integer registers saved on stack in prologue. The
> > + lower 8 bits are for legacy registers and the upper 8 bits are
> > + for r8-r15. */
> > + unsigned int saved_int_registers : 16;
> > +
> > /* The largest alignment, in bytes, of stack slot actually used. */
> > unsigned int max_used_stack_alignment;
> >
> > diff --git a/gcc/testsuite/gcc.target/i386/pr113689-1.c
> > b/gcc/testsuite/gcc.target/i386/pr113689-1.c
> > new file mode 100644
> > index 00000000000..8285c0a07b7
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr113689-1.c
> > @@ -0,0 +1,49 @@
> > +/* { dg-do run { target { lp64 && fpic } } } */
> > +/* { dg-options "-O2 -fno-pic -fprofile -mcmodel=large" } */
> > +
> > +#include <stdarg.h>
> > +
> > +__attribute__((noipa))
> > +void
> > +bar (int a1, int a2, int a3, int a4, int a5, int a6,
> > + char *x, char *y, int *z)
> > +{
> > + if (a1 != 1)
> > + __builtin_abort ();
> > + if (a2 != 2)
> > + __builtin_abort ();
> > + if (a3 != 3)
> > + __builtin_abort ();
> > + if (a4 != 4)
> > + __builtin_abort ();
> > + if (a5 != 5)
> > + __builtin_abort ();
> > + if (a6 != 6)
> > + __builtin_abort ();
> > + x[0] = 42;
> > + y[0] = 42;
> > + if (z[0] != 16)
> > + __builtin_abort ();
> > +}
> > +
> > +__attribute__((noipa))
> > +void
> > +foo (int c, int d, int e, int f, int g, int h, int z, ...)
> > +{
> > + typedef char B[32];
> > + B b __attribute__((aligned (32)));
> > + va_list ap;
> > + va_start (ap, z);
> > + double x = va_arg (ap, double);
> > + if (x > 40.0)
> > + __builtin_abort ();
> > + bar (c, d, e, f, g, h, &b[0], __builtin_alloca (z), &z);
> > + va_end (ap);
> > +}
> > +
> > +int
> > +main ()
> > +{
> > + foo (1, 2, 3, 4, 5, 6, 16, 38.0);
> > + return 0;
> > +}
> > diff --git a/gcc/testsuite/gcc.target/i386/pr113689-2.c
> > b/gcc/testsuite/gcc.target/i386/pr113689-2.c
> > new file mode 100644
> > index 00000000000..2e5579ac546
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr113689-2.c
> > @@ -0,0 +1,41 @@
> > +/* { dg-do run { target { lp64 && fpic } } } */
> > +/* { dg-options "-O2 -fpic -fprofile -mcmodel=large" } */
> > +
> > +__attribute__((noipa))
> > +void
> > +bar (int a1, int a2, int a3, int a4, int a5, int a6,
> > + char *x, char *y, int *z)
> > +{
> > + if (a1 != 1)
> > + __builtin_abort ();
> > + if (a2 != 2)
> > + __builtin_abort ();
> > + if (a3 != 3)
> > + __builtin_abort ();
> > + if (a4 != 4)
> > + __builtin_abort ();
> > + if (a5 != 5)
> > + __builtin_abort ();
> > + if (a6 != 6)
> > + __builtin_abort ();
> > + x[0] = 42;
> > + y[0] = 42;
> > + if (z[0] != 16)
> > + __builtin_abort ();
> > +}
> > +
> > +__attribute__((noipa))
> > +void
> > +foo (int c, int d, int e, int f, int g, int h, int z)
> > +{
> > + typedef char B[32];
> > + B b __attribute__((aligned (32)));
> > + bar (c, d, e, f, g, h, &b[0], __builtin_alloca (z), &z);
> > +}
> > +
> > +int
> > +main ()
> > +{
> > + foo (1, 2, 3, 4, 5, 6, 16);
> > + return 0;
> > +}
> > diff --git a/gcc/testsuite/gcc.target/i386/pr113689-3.c
> > b/gcc/testsuite/gcc.target/i386/pr113689-3.c
> > new file mode 100644
> > index 00000000000..dab75190635
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr113689-3.c
> > @@ -0,0 +1,48 @@
> > +/* { dg-do run { target { lp64 && fpic } } } */
> > +/* { dg-options "-O2 -fpic -fprofile -mcmodel=large" } */
> > +
> > +#include <stdarg.h>
> > +
> > +__attribute__((noipa))
> > +void
> > +bar (char *x, char *y, int *z)
> > +{
> > + x[0] = 42;
> > + y[0] = 42;
> > + if (z[0] != 16)
> > + __builtin_abort ();
> > +}
> > +
> > +__attribute__((noipa))
> > +void
> > +foo (int a1, int a2, int a3, int a4, int a5, int a6, int z, ...)
> > +{
> > + typedef char B[32];
> > + B b __attribute__((aligned (32)));
> > + va_list ap;
> > + va_start (ap, z);
> > + double x = va_arg (ap, double);
> > + if (x > 40.0)
> > + __builtin_abort ();
> > + if (a1 != 1)
> > + __builtin_abort ();
> > + if (a2 != 2)
> > + __builtin_abort ();
> > + if (a3 != 3)
> > + __builtin_abort ();
> > + if (a4 != 4)
> > + __builtin_abort ();
> > + if (a5 != 5)
> > + __builtin_abort ();
> > + if (a6 != 6)
> > + __builtin_abort ();
> > + bar (&b[0], __builtin_alloca (z), &z);
> > + va_end (ap);
> > +}
> > +
> > +int
> > +main ()
> > +{
> > + foo (1, 2, 3, 4, 5, 6, 16, 38.0);
> > + return 0;
> > +}
> > --
> > 2.43.0
> >
--
H.J.
