HI Roger,
It looks good.
Thank you for your contribution,
Claudiu
-----Original Message-----
From: Roger Sayle <ro...@nextmovesoftware.com>
Sent: Sunday, December 24, 2023 1:38 AM
To: gcc-patches@gcc.gnu.org
Cc: 'Claudiu Zissulescu' <claz...@gmail.com>; 'Jeff Law' <jeffreya...@gmail.com>
Subject: [ARC PATCH] Table-driven ashlsi implementation for better
code/rtx_costs.
One of the cool features of the H8 backend is its use of tables to select
optimal shift implementations for different CPU variants. This patch borrows
(plagiarizes) that idiom for SImode left shifts in the ARC backend (for CPUs
without a barrel-shifter). This provides a convenient mechanism for both
selecting the best implementation strategy (for speed vs. size), and providing
accurate rtx_costs [without duplicating a lot of logic].
Left shift RTX costs are especially important for use in synth_mult.
An example improvement is:
int foo(int x) { return 32768*x; }
which is now generated with -O2 -mcpu=em -mswap as:
foo: bmsk_s r0,r0,16
swap r0,r0
j_s.d [blink]
ror r0,r0
where previously the ARC backend would generate a loop:
foo: mov lp_count,15
lp 2f
add r0,r0,r0
nop
2: # end single insn loop
j_s [blink]
Tested with a cross-compiler to arc-linux hosted on x86_64, with no new
(compile-only) regressions from make -k check.
Ok for mainline if this passes Claudiu's and/or Jeff's testing?
[Thanks again to Jeff for finding the typo in my last ARC patch]
2023-12-23 Roger Sayle <ro...@nextmovesoftware.com>
gcc/ChangeLog
* config/arc/arc.cc (arc_shift_alg): New enumerated type for
left shift implementation strategies.
(arc_shift_info): Type for each entry of the shift strategy table.
(arc_shift_context_idx): Return a integer value for each code
generation context, used as an index
(arc_ashl_alg): Table indexed by context and shifted bit count.
(arc_split_ashl): Use the arc_ashl_alg table to select SImode
left shift implementation.
(arc_rtx_costs) <case ASHIFT>: Use the arc_ashl_alg table to
provide accurate costs, when optimizing for speed or size.
Thanks in advance,
Roger
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