Hi!
Apparently when looking for "signbit<mode>2" vector expanders, I've only
looked at sse.md and forgot mmx.md, which has two further ones and the
following patch still ICEd.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
ok for trunk?
2023-12-19 Jakub Jelinek <ja...@redhat.com>
PR target/112816
* config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1]
into a REG.
* gcc.target/i386/sse2-pr112816-2.c: New test.
--- gcc/config/i386/mmx.md.jj 2023-12-11 08:31:58.825941145 +0100
+++ gcc/config/i386/mmx.md 2023-12-18 20:55:53.899326034 +0100
@@ -1339,7 +1339,10 @@ (define_expand "signbitv2sf2"
(match_operand:V2SF 1 "register_operand") 0)
(match_dup 2)))]
"TARGET_MMX_WITH_SSE"
- "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);")
+{
+ operands[1] = force_reg (V2SFmode, operands[1]);
+ operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);
+})
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
@@ -2482,7 +2485,10 @@ (define_expand "signbit<mode>2"
(match_operand:VHF_32_64 1 "register_operand") 0)
(match_dup 2)))]
"TARGET_SSE2"
- "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);")
+{
+ operands[1] = force_reg (<MODE>mode, operands[1]);
+ operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);
+})
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
--- gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c.jj 2023-12-18
20:57:16.313175688 +0100
+++ gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c 2023-12-18
20:52:22.006283681 +0100
@@ -0,0 +1,16 @@
+/* PR target/112816 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+#define N 2
+struct S { float x[N]; };
+struct T { int x[N]; };
+
+struct T
+foo (struct S x)
+{
+ struct T res;
+ for (int i = 0; i < N; ++i)
+ res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+ return res;
+}
Jakub
