Add a terminating newline to various tests, and add missing
extensions to some test strings.
Obvious change, so I'll push it once my other option handling patches are
approved (if noone objects).
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/native_cpu_18.c: Add \+nopauth\n
* gcc.target/aarch64/options_set_7.c: Add \+crc\n
* gcc.target/aarch64/options_set_8.c: Add \+crc\+nodotprod\n
* gcc.target/aarch64/cpunative/native_cpu_0.c: Add \n
* gcc.target/aarch64/cpunative/native_cpu_1.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_2.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_3.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_4.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_5.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_6.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_7.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_8.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_9.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_10.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_11.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_12.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_13.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_14.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_15.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_16.c: Ditto.
* gcc.target/aarch64/cpunative/native_cpu_17.c: Ditto.
* gcc.target/aarch64/options_set_1.c: Ditto.
* gcc.target/aarch64/options_set_2.c: Ditto.
* gcc.target/aarch64/options_set_3.c: Ditto.
* gcc.target/aarch64/options_set_4.c: Ditto.
* gcc.target/aarch64/options_set_5.c: Ditto.
* gcc.target/aarch64/options_set_6.c: Ditto.
* gcc.target/aarch64/options_set_9.c: Ditto.
* gcc.target/aarch64/options_set_11.c: Ditto.
* gcc.target/aarch64/options_set_12.c: Ditto.
* gcc.target/aarch64/options_set_13.c: Ditto.
* gcc.target/aarch64/options_set_14.c: Ditto.
* gcc.target/aarch64/options_set_15.c: Ditto.
* gcc.target/aarch64/options_set_16.c: Ditto.
* gcc.target/aarch64/options_set_17.c: Ditto.
* gcc.target/aarch64/options_set_18.c: Ditto.
* gcc.target/aarch64/options_set_19.c: Ditto.
* gcc.target/aarch64/options_set_20.c: Ditto.
* gcc.target/aarch64/options_set_21.c: Ditto.
* gcc.target/aarch64/options_set_22.c: Ditto.
* gcc.target/aarch64/options_set_23.c: Ditto.
* gcc.target/aarch64/options_set_24.c: Ditto.
* gcc.target/aarch64/options_set_25.c: Ditto.
* gcc.target/aarch64/options_set_26.c: Ditto.
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
index
8499f87c39b173491a89626af56f4e193b1d12b5..fb5a7a18ad1a2d09ac4b231150a1bd9e72d6fab6
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
index
2cf0e89994b1cc0dc9fac67f4dc431c003498048..cb50e3b73057994432cc3ed15e3d5b57c7a3cb7b
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd\n} } } */
/* Test one where fp is on by default so turn off simd. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
index
ddb06b8227576807fe068b76dabed91a0223e4fa..6a524bad371c55fc32698ff0994f4ad431be49ca
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
/* Test one with no entry in feature list. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
index
96b9ca434ebbf007ddaa45d55a8c2b8e7a19a715..644f4792275bdd32a9f84241f0c329b046cbd909
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+sb} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sb\n} } } */
/* Test one with a feature name that overlaps with another one. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
index
c3b44adbf6c8a02c5003049eed2ed453587b8ad4..fb34ddf697cc6488d09c9fce66f2494f392248ac
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs\n} } } */
/* Test one where the longer feature overlaps with a shorter one. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
index
551669091c7010379a4c5247a27c517c4e67ef98..b29d50e1f79f92e45add1627904a695c511aec75
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
/* Test one with mixed order of feature bits. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
index
781ab1ebbfb46901ea38cd0063d984e372839ecd..59846f76acf83287230f16c23707dbb450debc3b
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\n} } } */
/* Test one where valid feature bits are at a boundary > buffer size. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
index
c9205d95b793c27cd61982b9262bbbcc4912ec6d..68a51898eab4348667b5389dc11fd90aa6108f6c
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
/* Test one where the bounary of buffer size would cut off and leave
a valid feature in the first full buffer. e.g. this will cut off at
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
index
2f963bb2312711691f6f1c5989a100b88671ad52..b3613165a05bf2fd1e93e6d89361ae9969ed62ba
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} }
} */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n}
} } */
/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
index
c68a697aa3e97ef52fd7e90233c5bb4ac8dbddd9..a9dde5ffab1405488d15d58c6420890a1b16e16a
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} }
} */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n}
} } */
/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
index
b5f0a3005f50cbf01edbcb8aefcc3c34aa11207f..10325df4497227a80297a140c9e1d689fccf96ef
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8.6-a\+crc\+fp16\+aes\+sha3\+rng} }
} */
+/* { dg-final { scan-assembler {\.arch
armv8.6-a\+crc\+fp16\+aes\+sha3\+rng\+nopauth\n} } } */
/* Test one where the boundary of buffer size would overwrite the last
character read when stitching the fgets-calls together. With the
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
index
edbdb56268ea7e18c7eab7a0dd74658fc626527c..cfca02cb147fd306a2475b9284cc83c291b8a1df
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
/* Test one where asimd is provided byt no fp. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
index
50685c297dbd7549ee1ea190dbfdb9dd90f3af12..316ddbd2ab9a4d98e9e8c93a6a193529938b773c
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\n} } } */
/* Test where asimd and fp are the only ones provided, these are default
and so shouldn't emit anything. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
index
91ae809757a4e31bf946fc27ec33f51001b0d3e8..053dd2b6dbe6974ac72d99007c286dd4e92d4398
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\n} } } */
/* Test one where all crypto bits are given so crypto should be enabled. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
index
84139e58ee0000816c4ea24f27bc28f5f6563bac..49dee9d6abcb360e4d2f80e3a3124b0fc95169e2
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\n} } } */
/* Test one where fp16 is available and so should be emitted. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
index
7608e8845a662219488effcdb8277006dcf457a9..20012beff7b85c14817e38437650d412ab7bb137
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
/* Test one where the feature bits for crypto and fp16 are given in
same order as declared in options file. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
index
72b14b4f6ed0d50a4fc8a35931fbd232b09d2b61..70a7e62fdffc4a908df083505c03a5fde70ce883
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
/* Test one where the crypto and fp16 options are specified in different
order from what is in the options file. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
index
7a5a2144a3973406b9ba7d268029a6940fb0be48..795dd5ff61b39d1bd2778274d1bf204c7cab0237
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
@@ -7,6 +7,6 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve\n} } } */
/* Test one where sve is enabled. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
index
528b5d029f1a21c8388a30120590c1b8d5b4a81f..6b55a739c851e559e3f8f8101b38c1b4b2b41fdc
100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
/* Test one here a feature that is a prefix of another is enabled.
In this case sve is a prefix to svesm4, but sve2-sm4 should be
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_1.c
b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
index
40d9a05c905eb07103d3b437b5c1351e8620ab33..dc5eff8c901d3dedc9b063fe02fd709c3ff7561f
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\n} 1 } } */
/* Check to see if crc is output by default. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_11.c
b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
index
d083bfdbd5c4ee0067607d506306a4271542c4d5..e0e82cf514dc5b819f9dd453d0f32c0fc79e9ffe
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\n} } } */
/* FP is default on, no need to pass on to assembler. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_12.c
b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
index
58a09fda2c1140bd63559f81280f41be5e1a2b17..aef44b3311310289832e258db5267b8822170673
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
/* fp16 not default, should be emitted. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_13.c
b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
index
2a517ecb58f87ca5653bb6aac7e2db12a1de0926..b116e08e75b433021e5a93bfeab7671fc48c7f26
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
/* FP is part of FP16, don't emit it. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_14.c
b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
index
c192bf6cb63661f3d743b8c988ba2162e64c0959..e9fc3e5dc2c3dc85b0182f5562c770b96a91896d
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
/* fmp16fml is smallest option to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_15.c
b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
index
32ec3ea4643197e1bef052777a2717c73bef7d05..999791b9f0d831e7a359ec0cd1dd099068b317aa
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*\n} } } */
/* fp included in fp16fml, only emit latter. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_16.c
b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
index
b45c01a915b99f9be77f206f862a69b4c81d0ff8..477b71c3817902b4577314e65ad87e52efba894c
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
/* fp16fml is smallest options to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_17.c
b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
index
c490e1f47a0a7a3adcbb7e96a3974d5651a023e8..8b21e2e1a0a0d4c7daa13fc6c3e4968786474a74
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod\n} } } */
/* dotprod needs to be emitted pre armv8.4. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_18.c
b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
index
61587dbbd63a9803067553f6f5a4bf6ce86c090f..977b41e3e21e600ac0ae1276e127181081dbb26c
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
/* dotprod is default in armv8.4-a, don't emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_19.c
b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
index
72b58126182fa300bf3d065e8a9f18ea9a090438..0b2ec02e5c6b3375b8ff84c29bc6923f7f70cdc8
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_19.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
/* fp default, don't emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_2.c
b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
index
f82cb5f7823b47d890046d077f2f47f45cb69803..937edc693c2db9661789ff19434b7a09a720d61f
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } }
*/
/* Check to see if crc and crypto are maintained if crypto specified. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_20.c
b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
index
b383e0aced2d2a12d8ec4ff021d27361b81356e0..452b48c7291beee3d13373635741398e53b13d31
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_20.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_21.c
b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
index
19fcd6fda6e0687ae03eb84ba677b1fc3f438300..f142e70fb51e96e72d7bcd63ca966c674e9cbb57
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_21.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_22.c
b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
index
77ae4089f3985917b314d5d548a9b9999ade8a15..04ddd461857a1a6e6a99f5e65ba5ce3bc0784918
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_22.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_23.c
b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
index
dee637c5d2cba1549861add1d81e697036aed047..81cfe0189e0661eb36ec16cec477c9b1faf10f0a
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_23.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_24.c
b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
index
54b0e3d4a8319144c1dd2fc8d736ca359788e738..425cc513eeeb51214ff8359c36902297db7ee238
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_24.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_25.c
b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
index
a3b2d63c06eb0bb3f1d59a4cdfb08d5918238c0c..5a3c1059301912429afd93a71d48e61a0e6c3fbe
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_25.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_26.c
b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
index
b383e0aced2d2a12d8ec4ff021d27361b81356e0..452b48c7291beee3d13373635741398e53b13d31
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_26.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
/* fp16 smallest set to emit. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_3.c
b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
index
7d350cfa36168a4d3e61357bc192ed5e18cda620..96140e36270d8a7aae3d651ecdf2ae58fb87ff23
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } }
*/
/* Check if smallest set is maintained when outputting. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_4.c
b/gcc/testsuite/gcc.target/aarch64/options_set_4.c
index
5370e02e1531dd26e5a5fb37de0bab6aed513b71..7b00d09a47f0521f148b1dd576b4100db38aec00
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_4.c
@@ -6,7 +6,7 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } }
*/
/* Check if individual bits that make up a grouping is specified that only the
grouping is kept. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_5.c
b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
index
b4c0901195ede4fe0dd71fbe02a47c35e9dedbbd..028fbc46ef6a05c6587edeb66cd746f97fc6f071
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
@@ -6,7 +6,7 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
/* Check if turning off feature bits works correctly and grouping is no
longer valid. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_6.c
b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
index
2a1d7fe5b8eaabad485cb4afd7501ea00af81abc..09ebdaa212bd55ed80aee774e650242e3417471d
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
/* +crypto turns on +aes and +sha2, but +nosha2 disables +crypto. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_7.c
b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
index
71a2c8a19058c0ec25546085076503d206129e10..eb5724f74e09f1c2dadb758527d3690c17c1064b
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
@@ -6,6 +6,6 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\n} 1 } } */
/* Checking if enabling default features drops the superfluous bits. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_8.c
b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
index
83be1bd7a5c3f2bc8d11a14f2c16415c6a7056f2..a0eacff9ce636123a705028faff940ca9a9bb287
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
@@ -6,7 +6,7 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\+nodotprod\n} 1
} } */
/* Checking if trying to turn off default features propagates the commandline
option. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_9.c
b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
index
e3c7cdc54ffb0616877260c562354496cfdcb688..5052f891b41c0b654f31a7334f44ba389260fec1
100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
@@ -6,7 +6,7 @@ int main ()
return 0;
}
-/* { dg-final { scan-assembler-times {\.arch armv8\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\-a\n} 1 } } */
/* Check that grouping of bits that don't form a synthetic group don't turn
on the parent. e.g. rdma turns on simd+fp, but simd+fp does not turn on
