> I think the VLS modes are excluded exactly meet we expected. > For example, when zvl128b, LMUL = 1. > We allow allow VLS modes <= 128bit, exclude VLS modes > 128bits. > We have the same behavior as ARM SVE.
I just found the ordered_p a bit unintuitive here at first sight. But when thinking about it, not so bad. So we only allow modes that are either known larger, equal or smaller but not either. LGTM. > This check is already in the vls_mode_valid_p. Seems I'm blind... sorry. Regards Robin
