OK. Make sense。 LGTM as long as you remove all GET_MODE_BITSIZE (GET_MODE_INNER (<VINDEX>mode)) <= GET_MODE_BITSIZE (Pmode)
juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-11-16 04:30 To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law CC: rdapp.gcc Subject: Re: [PATCH] RISC-V: Disallow 64-bit indexed loads and stores for rv32gcv. On 11/15/23 15:29, 钟居哲 wrote: > Could you show me the example ? > > It's used by handling SEW = 64 on RV32. I don't know why this patch touch > this code. Use gather_load_run-1.c with the 64-bit index patterns disabled on rv32. We insert (mem:DI (reg:SI)) into a vector so use the SEW = 64 demote handler. There we set vl = vl * 2 (which is correct) but the mode (i.e. vector) just changes from DI to SI while keeping the number of elements the same. Then we get e.g. go from V8DI to V8SI and slide down 16 elements, losing the lower half. Regards Robin
