On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> This test shows vectorizing stmts using SLP 4 times instead of 2 for RVV.
> The reason is RVV has 512 bit vector.
> Here is comparison between RVV ans ARM SVE:
> https://godbolt.org/z/xc5KE5rPs
>
> Confirm GCN also matches 4 SLP. This patch is passed on both GCN and RVV.
>
> Ok for trunk ?
Does --param vect-epilogues-nomask=0 help?
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/vect/pr97428.c: Adapt for RVV and GCN.
>
> ---
> gcc/testsuite/gcc.dg/vect/pr97428.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.dg/vect/pr97428.c
> b/gcc/testsuite/gcc.dg/vect/pr97428.c
> index ad6416096aa..f77adb1be97 100644
> --- a/gcc/testsuite/gcc.dg/vect/pr97428.c
> +++ b/gcc/testsuite/gcc.dg/vect/pr97428.c
> @@ -43,5 +43,6 @@ void foo_i2(dcmlx4_t dst[], const dcmlx_t src[], int n)
> /* { dg-final { scan-tree-dump "Detected interleaving store of size 16"
> "vect" } } */
> /* We're not able to peel & apply re-aligning to make accesses well-aligned
> for !vect_hw_misalign,
> but we could by peeling the stores for alignment and applying re-aligning
> loads. */
> -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"
> { xfail { ! vect_hw_misalign } } } } */
> +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"
> { target { { vect_hw_misalign } && { ! vect512 } } } } } */
> +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect"
> { target { vect512 } } } } */
> /* { dg-final { scan-tree-dump-not "gap of 6 elements" "vect" } } */
>
--
Richard Biener <[email protected]>
SUSE Software Solutions Germany GmbH,
Frankenstrasse 146, 90461 Nuernberg, Germany;
GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)
