On 07/11/2023 10:10, juzhe.zh...@rivai.ai wrote:
So, this patch not only fixes RVV FAIL, but also fixes GCN ?

Before the patch I have:

PASS: gcc.dg/vect/pr97428.c (test for excess errors)
PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving load of size 8" PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving store of size 16"
gcc.dg/vect/pr97428.c: pattern found 4 times
XFAIL: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
PASS: gcc.dg/vect/pr97428.c scan-tree-dump-not vect "gap of 6 elements"

With the patch I now get:

PASS: gcc.dg/vect/pr97428.c (test for excess errors)
PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving load of size 8" PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving store of size 16"
gcc.dg/vect/pr97428.c: pattern found 4 times
XFAIL: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2 XPASS: gcc.dg/vect/pr97428.c scan-tree-dump-times vect "vectorizing stmts using SLP" 4
PASS: gcc.dg/vect/pr97428.c scan-tree-dump-not vect "gap of 6 elements"

It's different, but not "fixed".

Andrew



------------------------------------------------------------------------
juzhe.zh...@rivai.ai

    *From:* Andrew Stubbs <mailto:a...@codesourcery.com>
    *Date:* 2023-11-07 18:09
    *To:* Juzhe-Zhong <mailto:juzhe.zh...@rivai.ai>;
    gcc-patches@gcc.gnu.org <mailto:gcc-patches@gcc.gnu.org>
    *CC:* jeffreya...@gmail.com <mailto:jeffreya...@gmail.com>;
    rguent...@suse.de <mailto:rguent...@suse.de>
    *Subject:* Re: [PATCH] test: Fix FAIL of pr97428.c for RVV
    On 07/11/2023 07:44, Juzhe-Zhong wrote:
     > This test shows vectorizing stmts using SLP 4 times instead of 2
    for RVV.
     > The reason is RVV has 512 bit vector.
     > Here is comparison between RVV ans ARM SVE:
     > https://godbolt.org/z/xc5KE5rPs
     >
     > But I notice AMDGCN also has 512 bit vector, seems this patch
    will cause FAIL in GCN ?
     >
     > Not sure whether GCN is 2 times or 4 times ?
    The pattern matches 4 times on GCN.
     > gcc/testsuite/ChangeLog:
     >
     > * gcc.dg/vect/pr97428.c: Fix FAIL for RVV.
     >
     > ---
     >   gcc/testsuite/gcc.dg/vect/pr97428.c | 3 ++-
     >   1 file changed, 2 insertions(+), 1 deletion(-)
     >
     > diff --git a/gcc/testsuite/gcc.dg/vect/pr97428.c
    b/gcc/testsuite/gcc.dg/vect/pr97428.c
     > index ad6416096aa..352c9bf04a7 100644
     > --- a/gcc/testsuite/gcc.dg/vect/pr97428.c
     > +++ b/gcc/testsuite/gcc.dg/vect/pr97428.c
     > @@ -43,5 +43,6 @@ void foo_i2(dcmlx4_t dst[], const dcmlx_t
    src[], int n)
     >   /* { dg-final { scan-tree-dump "Detected interleaving store of
    size 16" "vect" } } */
     >   /* We're not able to peel & apply re-aligning to make accesses
    well-aligned for !vect_hw_misalign,
     >      but we could by peeling the stores for alignment and
    applying re-aligning loads.  */
     > -/* { dg-final { scan-tree-dump-times "vectorizing stmts using
    SLP" 2 "vect" { xfail { ! vect_hw_misalign } } } } */
     > +/* { dg-final { scan-tree-dump-times "vectorizing stmts using
    SLP" 2 "vect" { xfail { { ! vect_hw_misalign } || { vect512 } } } } } */
     > +/* { dg-final { scan-tree-dump-times "vectorizing stmts using
    SLP" 4 "vect" { xfail { { ! vect_hw_misalign } || { ! vect512 } } }
    } } */
     >   /* { dg-final { scan-tree-dump-not "gap of 6 elements" "vect" }
    } */


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