On Mon, 2023-09-25 at 17:38 +0800, Chenghui Pan wrote:
> Hi!
>
> After some attemptions, I think we still ne to check
> "check_effective_target_loongarch_sx" in vect_int_mod. I wrote some
> temp logics in gcc/testsuite/lib/target-supports.exp like this:
>
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index 2de41cef2f6..91e1c22a6e1 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -8586,7 +8586,8 @@ proc check_effective_target_vect_int_mod { } {
> return [check_cached_effective_target_indexed vect_int_mod {
> expr { ([istarget powerpc*-*-*]
> && [check_effective_target_has_arch_pwr10])
> - || [istarget amdgcn-*-*] }}]
> + || [istarget loongarch*-*-*]
> + || [istarget amdgcn-*-*] }}]
> }
>
> # Return 1 if the target supports vector even/odd elements extraction,
> 0 otherwise.
> @@ -11174,6 +11175,12 @@ proc check_vect_support_and_set_flags { } {
> lappend DEFAULT_VECTCFLAGS "--param" "riscv-vector-abi"
> set dg-do-what-default compile
> }
> + } elseif [istarget loongarch*-*-*] {
> + if [check_effective_target_loongarch_asx_hw] {
> + lappend DEFAULT_VECTCFLAGS "-mdouble-float" "-mlasx"
> + } elseif [check_effective_target_loongarch_sx_hw] {
> + lappend DEFAULT_VECTCFLAGS "-mdouble-float" "-mlsx"
> + }
I think we can always enable LASX in DEFAULT_VECTCFLAGS, but set dg-do-
what-default to "run" only if both the hardware and the kernel supports
LASX. If the kernel or the hardware is not capable we set dg-do-what-
default to "compile".
> } else {
> return 0
> }
> \* temp impl of sx/asx hw proc *\
>
> And then in make check without --target_board=unix/-mlasx, vect.exp is
> invoked with expected vector isa options, but pr104992.c failed because
> it expected result with "vect_int_mod returns 1" but it was compiled
> without -mlsx/-mlasx. Seems pr104992.c is invoked by gcc.dg/dg.exp,
> pr104992.c is not affected by DEFAULT_CFLAGS, so we still need to check
> if LSX/LASX is available in vect_int_mod.
>
> Other parts of new patch is still WIP.
--
Xi Ruoyao <[email protected]>
School of Aerospace Science and Technology, Xidian University
