Notice we are missing these tests. Committed.
gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/abs-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/not-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/sqrt-1.c: New test. --- .../gcc.target/riscv/rvv/autovec/vls/abs-1.c | 52 ++++++++++++++ .../gcc.target/riscv/rvv/autovec/vls/not-1.c | 69 +++++++++++++++++++ .../gcc.target/riscv/rvv/autovec/vls/sqrt-1.c | 52 ++++++++++++++ 3 files changed, 173 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c new file mode 100644 index 00000000000..7c7a5bd6ac7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V (fabs, 2, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 4, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 8, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 16, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 32, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 64, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 128, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 256, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 512, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 1024, _Float16, __builtin_fabs) +DEF_OP_V (fabs, 2048, _Float16, __builtin_fabs) + +DEF_OP_V (fabs, 2, float, __builtin_fabs) +DEF_OP_V (fabs, 4, float, __builtin_fabs) +DEF_OP_V (fabs, 8, float, __builtin_fabs) +DEF_OP_V (fabs, 16, float, __builtin_fabs) +DEF_OP_V (fabs, 32, float, __builtin_fabs) +DEF_OP_V (fabs, 64, float, __builtin_fabs) +DEF_OP_V (fabs, 128, float, __builtin_fabs) +DEF_OP_V (fabs, 256, float, __builtin_fabs) +DEF_OP_V (fabs, 512, float, __builtin_fabs) +DEF_OP_V (fabs, 1024, float, __builtin_fabs) + +DEF_OP_V (fabs, 2, double, __builtin_fabs) +DEF_OP_V (fabs, 4, double, __builtin_fabs) +DEF_OP_V (fabs, 8, double, __builtin_fabs) +DEF_OP_V (fabs, 16, double, __builtin_fabs) +DEF_OP_V (fabs, 32, double, __builtin_fabs) +DEF_OP_V (fabs, 64, double, __builtin_fabs) +DEF_OP_V (fabs, 128, double, __builtin_fabs) +DEF_OP_V (fabs, 256, double, __builtin_fabs) +DEF_OP_V (fabs, 512, double, __builtin_fabs) + +/* { dg-final { scan-assembler-times {vfabs\.v\s+v[0-9]+,\s*v[0-9]+} 30 } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c new file mode 100644 index 00000000000..316bac88fed --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c @@ -0,0 +1,69 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V (not, 1, int8_t, ~) +DEF_OP_V (not, 2, int8_t, ~) +DEF_OP_V (not, 4, int8_t, ~) +DEF_OP_V (not, 8, int8_t, ~) +DEF_OP_V (not, 16, int8_t, ~) +DEF_OP_V (not, 32, int8_t, ~) +DEF_OP_V (not, 64, int8_t, ~) +DEF_OP_V (not, 128, int8_t, ~) +DEF_OP_V (not, 256, int8_t, ~) +DEF_OP_V (not, 512, int8_t, ~) +DEF_OP_V (not, 1024, int8_t, ~) +DEF_OP_V (not, 2048, int8_t, ~) +DEF_OP_V (not, 4096, int8_t, ~) + +DEF_OP_V (not, 1, int16_t, ~) +DEF_OP_V (not, 2, int16_t, ~) +DEF_OP_V (not, 4, int16_t, ~) +DEF_OP_V (not, 8, int16_t, ~) +DEF_OP_V (not, 16, int16_t, ~) +DEF_OP_V (not, 32, int16_t, ~) +DEF_OP_V (not, 64, int16_t, ~) +DEF_OP_V (not, 128, int16_t, ~) +DEF_OP_V (not, 256, int16_t, ~) +DEF_OP_V (not, 512, int16_t, ~) +DEF_OP_V (not, 1024, int16_t, ~) +DEF_OP_V (not, 2048, int16_t, ~) + +DEF_OP_V (not, 1, int32_t, ~) +DEF_OP_V (not, 2, int32_t, ~) +DEF_OP_V (not, 4, int32_t, ~) +DEF_OP_V (not, 8, int32_t, ~) +DEF_OP_V (not, 16, int32_t, ~) +DEF_OP_V (not, 32, int32_t, ~) +DEF_OP_V (not, 64, int32_t, ~) +DEF_OP_V (not, 128, int32_t, ~) +DEF_OP_V (not, 256, int32_t, ~) +DEF_OP_V (not, 512, int32_t, ~) +DEF_OP_V (not, 1024, int32_t, ~) + +DEF_OP_V (not, 1, int64_t, ~) +DEF_OP_V (not, 2, int64_t, ~) +DEF_OP_V (not, 4, int64_t, ~) +DEF_OP_V (not, 8, int64_t, ~) +DEF_OP_V (not, 16, int64_t, ~) +DEF_OP_V (not, 32, int64_t, ~) +DEF_OP_V (not, 64, int64_t, ~) +DEF_OP_V (not, 128, int64_t, ~) +DEF_OP_V (not, 256, int64_t, ~) +DEF_OP_V (not, 512, int64_t, ~) + +/* { dg-final { scan-assembler-times {vnot\.v\s+v[0-9]+,\s*v[0-9]+} 42 } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c new file mode 100644 index 00000000000..60dbfd77c2a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V (sqrt, 2, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 4, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 8, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 16, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 32, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 64, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 128, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 256, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 512, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 1024, _Float16, __builtin_sqrtf16) +DEF_OP_V (sqrt, 2048, _Float16, __builtin_sqrtf16) + +DEF_OP_V (sqrt, 2, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 4, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 8, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 16, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 32, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 64, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 128, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 256, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 512, float, __builtin_sqrtf) +DEF_OP_V (sqrt, 1024, float, __builtin_sqrtf) + +DEF_OP_V (sqrt, 2, double, __builtin_sqrt) +DEF_OP_V (sqrt, 4, double, __builtin_sqrt) +DEF_OP_V (sqrt, 8, double, __builtin_sqrt) +DEF_OP_V (sqrt, 16, double, __builtin_sqrt) +DEF_OP_V (sqrt, 32, double, __builtin_sqrt) +DEF_OP_V (sqrt, 64, double, __builtin_sqrt) +DEF_OP_V (sqrt, 128, double, __builtin_sqrt) +DEF_OP_V (sqrt, 256, double, __builtin_sqrt) +DEF_OP_V (sqrt, 512, double, __builtin_sqrt) + +/* { dg-final { scan-assembler-times {vfsqrt\.v\s+v[0-9]+,\s*v[0-9]+} 30 } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ -- 2.36.3