Hi, PR111366 exposes one thing that can be improved in function rs6000_update_ipa_fn_target_info is to skip the given empty inline asm string, since it's impossible to adopt any hardware features (so far HTM).
Since this rs6000_update_ipa_fn_target_info related approach exists in GCC12 and later, the affected project highway has updated its target pragma with ",htm", see the link: https://github.com/google/highway/commit/15e63d61eb535f478bc I'd not bother to consider an inline asm parser for now but will file a separated PR for further enhancement. Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and powerpc64le-linux-gnu P9 and P10. I'm going to push this soon. BR, Kewen ----- PR target/111366 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip empty inline asm. gcc/testsuite/ChangeLog: * g++.target/powerpc/pr111366.C: New test. --- gcc/config/rs6000/rs6000.cc | 9 ++-- gcc/testsuite/g++.target/powerpc/pr111366.C | 48 +++++++++++++++++++++ 2 files changed, 54 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/g++.target/powerpc/pr111366.C diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index d48134b35f8..40925407a99 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -25475,9 +25475,12 @@ rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) /* Assume inline asm can use any instruction features. */ if (gimple_code (stmt) == GIMPLE_ASM) { - /* Should set any bits we concerned, for now OPTION_MASK_HTM is - the only bit we care about. */ - info |= RS6000_FN_TARGET_INFO_HTM; + const char *asm_str = gimple_asm_string (as_a<const gasm *> (stmt)); + /* Ignore empty inline asm string. */ + if (strlen (asm_str) > 0) + /* Should set any bits we concerned, for now OPTION_MASK_HTM is + the only bit we care about. */ + info |= RS6000_FN_TARGET_INFO_HTM; return false; } else if (gimple_code (stmt) == GIMPLE_CALL) diff --git a/gcc/testsuite/g++.target/powerpc/pr111366.C b/gcc/testsuite/g++.target/powerpc/pr111366.C new file mode 100644 index 00000000000..6d3d8ebc552 --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/pr111366.C @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ + +/* Verify it doesn't emit any error messages. */ + +#include <stddef.h> +#define HWY_PRAGMA(tokens) _Pragma (#tokens) +#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +__attribute__ ((always_inline)) void +PreventElision () +{ + asm(""); +} +#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +HWY_BEFORE_NAMESPACE () namespace detail +{ + template <typename, size_t, int> struct CappedTagChecker + { + }; +} +template <typename T, size_t kLimit, int kPow2 = 0> +using CappedTag = detail::CappedTagChecker<T, kLimit, kPow2>; +template <typename, size_t, size_t kMinArg, class Test> struct ForeachCappedR +{ + static void Do (size_t, size_t) + { + CappedTag<int, kMinArg> d; + Test () (int(), d); + } +}; +template <class Test> struct ForPartialVectors +{ + template <typename T> void operator() (T) + { + ForeachCappedR<T, 1, 1, Test>::Do (1, 1); + } +}; +struct TestFloorLog2 +{ + template <class T, class DF> void operator() (T, DF) { PreventElision (); } +}; +void +TestAllFloorLog2 () +{ + ForPartialVectors<TestFloorLog2> () (float()); +} + -- 2.31.1
