On Wed, 30 Aug 2023, Juzhe-Zhong wrote:
> Like ARM SVE, add RVV variable length xfail.
OK
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/vect/slp-reduc-7.c: Add RVV.
>
> ---
> gcc/testsuite/gcc.dg/vect/slp-reduc-7.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c
> b/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c
> index 7a958f24733..a8528ab53ee 100644
> --- a/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c
> +++ b/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c
> @@ -57,5 +57,5 @@ int main (void)
> /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail
> vect_no_int_add } } } */
> /* For variable-length SVE, the number of scalar statements in the
> reduction exceeds the number of elements in a 128-bit granule. */
> -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"
> { xfail { vect_no_int_add || { aarch64_sve && vect_variable_length } } } } }
> */
> +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"
> { xfail { vect_no_int_add || { { aarch64_sve && vect_variable_length } || {
> riscv_vector && vect_variable_length } } } } } } */
> /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 0 "vect" { xfail {
> aarch64_sve && vect_variable_length } } } } */
>
--
Richard Biener <[email protected]>
SUSE Software Solutions Germany GmbH,
Frankenstrasse 146, 90461 Nuernberg, Germany;
GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)
