No, we don't need to.
len_load/len_store optab in backend
(define_expand "len_load_v16qi"
[(match_operand:V16QI 0 "register_operand")
(match_operand:V16QI 1 "memory_operand")
(match_operand:QI 2 "register_operand")
(match_operand:QI 3 "vll_bias_operand")
]
"TARGET_VX && TARGET_64BIT"
{
rtx mem = adjust_address (operands[1], BLKmode, 0);
rtx len = gen_reg_rtx (SImode);
emit_move_insn (len, gen_rtx_ZERO_EXTEND (SImode, operands[2]));
emit_insn (gen_vllv16qi (operands[0], len, mem));
DONE;
})
(define_expand "len_store_v16qi"
[(match_operand:V16QI 0 "memory_operand")
(match_operand:V16QI 1 "register_operand")
(match_operand:QI 2 "register_operand")
(match_operand:QI 3 "vll_bias_operand")
]
"TARGET_VX && TARGET_64BIT"
{
rtx mem = adjust_address (operands[0], BLKmode, 0);
rtx len = gen_reg_rtx (SImode);
emit_move_insn (len, gen_rtx_ZERO_EXTEND (SImode, operands[2]));
emit_insn (gen_vstlv16qi (operands[1], len, mem));
DONE;
});;
is already correct order {len,bias}. Only Gimple IR need to be adjusted.
I have already tested len_load/len_store optab.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-03 17:17
To: juzhe.zhong; gcc-patches
CC: rdapp.gcc; richard.sandiford; rguenther; linkw; krebbel
Subject: Re: [PATCH V2] Middle-end: Change order of
LEN_MASK_LOAD/LEN_MASK_STORE arguments
Hi Juzhe,
when changing the argument order for LEN_LOAD/LEN_STORE, you will also
need to adjust rs6000's and s390's expanders.
Regards
Robin
