[PATCH v1] RISC-V: Fix one typo in full-vec-movel test

[Pan Li via Gcc-patches]

From: Pan Li <pan2...@intel.com>

This patch would like to fix one typo when checking assembly of
full-vec-movel.

Signed-off-by: Pan Li <pan2...@intel.com>

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c:
        Adjust dg-do to comiple for asm checking.
---
 .../gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c
index c1119cddee7..c32c31ecd69 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_vector } } } */
+/* { dg-do compile } */
 /* { dg-additional-options "-std=c99 -O3 -march=rv64gcv_zvl128b 
-fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include <stdint-gcc.h>
-- 
2.34.1