From: Juzhe-Zhong <juzhe.zh...@rivai.ai> Hi, Richi.
We (RVV) is going to add a rounding mode operand into floating-point instructions which have 11 operands. Since we are going have intrinsic that is adding rounding mode argument: https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226 This is the patch that is adding rounding mode operand in RISC-V port: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618573.html You can see there are 11 operands in these patterns. Is it Ok for trunk ? Thanks gcc/ChangeLog: * optabs.cc (maybe_gen_insn): Add case to generate instruction that has 11 operands. --- gcc/optabs.cc | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/gcc/optabs.cc b/gcc/optabs.cc index c8e39c82d57..a12333c7169 100644 --- a/gcc/optabs.cc +++ b/gcc/optabs.cc @@ -8139,6 +8139,11 @@ maybe_gen_insn (enum insn_code icode, unsigned int nops, ops[3].value, ops[4].value, ops[5].value, ops[6].value, ops[7].value, ops[8].value, ops[9].value); + case 11: + return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value, + ops[3].value, ops[4].value, ops[5].value, + ops[6].value, ops[7].value, ops[8].value, + ops[9].value, ops[10].value); } gcc_unreachable (); } -- 2.36.1
