> +/* Get the mask for merge approach.
> +
> + Consider such following case:
> + {a, b, a, b, a, b, a, b, a, b, a, b, a, b, a, b}
> + To merge "a", the mask should be 1010....
> + To merge "b", the mask should be 0101....
> +*/
> +rtx
> +rvv_builder::get_merge_mask_bitfield (unsigned int index) const
> +{
> + uint64_t base_mask = (1ULL << index);
> + uint64_t mask = 0;
> + for (unsigned int i = 0; i < (64 / npatterns ()); i++)
What the magic 64 means?
...
> +static void
> +expand_vector_init_merge_repeating_sequence (rtx target,
> + const rvv_builder &builder)
> +{
> + machine_mode mask_mode;
> + gcc_assert (get_mask_mode (builder.mode ()).exists (&mask_mode));
> +
> + machine_mode dup_mode = builder.mode ();
> + if (known_gt (GET_MODE_SIZE (dup_mode), BYTES_PER_RISCV_VECTOR))
> + {
> + poly_uint64 nunits
> + = exact_div (BYTES_PER_RISCV_VECTOR, builder.inner_units ());
> + gcc_assert (
> + get_vector_mode (builder.inner_int_mode (), nunits).exists
> (&dup_mode));
gcc_assert will removed at release mode, so it's not you want I guess?
> + }
> + else
> + {
> + if (FLOAT_MODE_P (dup_mode))
> + gcc_assert (get_vector_mode (builder.inner_int_mode (),
> + GET_MODE_NUNITS (dup_mode))
> + .exists (&dup_mode));
Same issue
> + }
> +
> + machine_mode dup_mask_mode;
> + gcc_assert (get_mask_mode (dup_mode).exists (&dup_mask_mode));
Same issue
