Re: [PATCH v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]

[Jeff Law via Gcc-patches]

On 5/8/23 08:12, Raphael Moreira Zinsly wrote:

Changes since v1:
        - Remove subreg from operand 1.

-- >8 --

We were not able to match the CTZ sign extend pattern on RISC-V
because it gets optimized to zero extend and/or to ANDI patterns.
For the ANDI case, combine scrambles the RTL and generates the
extension by using subregs.

        gcc/ChangeLog:
                PR target/106888
                * config/riscv/bitmanip.md
                (<bitmanip_optab>disi2): Match with any_extend.
                (<bitmanip_optab>disi2_sext): New pattern to match
                with sign extend using an ANDI instruction.

        gcc/testsuite/ChangeLog:
                PR target/106888
                * gcc.target/riscv/pr106888.c: New test.
                * gcc.target/riscv/zbbw.c: Check for ANDI.

OK
jeff