[PATCH][committed] aarch64: PR target/99195 annotate simple floating-point patterns for vec-concat with zero

[Kyrylo Tkachov via Gcc-patches]

Hi all,

Continuing the, almost mechanical, series this patch adds annotation for some 
of the simple
floating-point patterns we have, and adds testing to ensure that redundant 
zeroing instructions
are eliminated.

Bootstrapped and tested on aarch64-none-linux-gnu and also aarch64_be-none-elf.
Pushing to trunk.
Thanks,
Kyrill

gcc/ChangeLog:

        PR target/99195
        * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
        (add<mode>3<vczle><vczbe>): ... This.
        (sub<mode>3): Rename to...
        (sub<mode>3<vczle><vczbe>): ... This.
        (mul<mode>3): Rename to...
        (mul<mode>3<vczle><vczbe>): ... This.
        (*div<mode>3): Rename to...
        (*div<mode>3<vczle><vczbe>): ... This.
        (neg<mode>2): Rename to...
        (neg<mode>2<vczle><vczbe>): ... This.
        (abs<mode>2): Rename to...
        (abs<mode>2<vczle><vczbe>): ... This.
        (<frint_pattern><mode>2): Rename to...
        (<frint_pattern><mode>2<vczle><vczbe>): ... This.
        (<fmaxmin><mode>3): Rename to...
        (<fmaxmin><mode>3<vczle><vczbe>): ... This.
        (*sqrt<mode>2): Rename to...
        (*sqrt<mode>2<vczle><vczbe>): ... This.

gcc/testsuite/ChangeLog:

        PR target/99195
        * gcc.target/aarch64/simd/pr99195_1.c: Add testing for some unary
        and binary floating-point ops.
        * gcc.target/aarch64/simd/pr99195_2.c: New test.

vczfp.patch
Description: vczfp.patch