From: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Address Jeff's comment:
https://patchwork.sourceware.org/project/gcc/patch/20230330012804.110539-1-juzhe.zh...@rivai.ai/
Add a function comment.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
comment for cleanup_insns.
---
gcc/config/riscv/riscv-vsetvl.cc | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index ac99028df43..fa68b8a0462 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -3998,6 +3998,21 @@ pass_vsetvl::pre_vsetvl (void)
commit_edge_insertions ();
}
+/* Before VSETVL PASS, RVV instructions pattern is depending on AVL operand
+ implicitly. Since we will emit VSETVL instruction and make RVV instructions
+ depending on VL/VTYPE global status registers, we remove the such AVL
operand
+ in the RVV instructions pattern here in order to remove AVL dependencies
when
+ AVL operand is a register operand.
+
+ Before the VSETVL PASS:
+ li a5,32
+ ...
+ vadd.vv (..., a5)
+ After the VSETVL PASS:
+ li a5,32
+ vsetvli zero, a5, ...
+ ...
+ vadd.vv (..., const_int 0). */
void
pass_vsetvl::cleanup_insns (void) const
{
--
2.36.1
