On Wed, Apr 12, 2023 at 12:02:12PM +0200, Jakub Jelinek wrote: > On Wed, Apr 12, 2023 at 08:21:26AM +0200, Jakub Jelinek via Gcc-patches wrote: > > I would have expected something like > > WORD_REGISTER_OPERATIONS && known_le (GET_MODE_PRECISION (mode), > > BITS_PER_WORD) > > as the condition to use word_mode, rather than just > > WORD_REGISTER_OPERATIONS. In both spots. Because larger modes should be > > used as is, not a narrower word_mode instead of them. > > In patch form that would be following (given that the combine.cc change > had scalar_int_mode mode we can as well just use normal comparison, and > simplify-rtx.cc has it guarded on HWI_COMPUTABLE_MODE_P, which is also only > true for scalar int modes). > > I've tried the pr108947.c testcase, but I see no differences in the assembly > before/after the patch (but dunno if I'm using the right options). > The pr109040.c testcase from the patch I don't see the expected zero > extension without the patch and do see it with it. > > As before, I can only test this easily on non-WORD_REGISTER_OPERATIONS > targets.
There are no doubt tens more similar WORD_REGISTER_OPERATIONS problems lurking. We would be much better off if this wart was removed and we handled such things properly. That said: > PR target/109040 > * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in > word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is > smaller than word_mode. > * simplify-rtx.cc (simplify_context::simplify_binary_operation_1) > <case AND>: Likewise. > > * gcc.c-torture/execute/pr109040.c: New test. Okay for trunk. Thanks! Segher
