From: Juzhe-Zhong <[email protected]>
According RVV ISA:
https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vector-type-register-vtype
We have LMUL: 1/8, 1/4, 1/2, 1, 2, 4, 8
Also, for segment instructions, we have tuple type for NF = 2 ~ 8.
For example, for LMUL = 1/2, SEW = 32, we have vint32mf2_t,
we will have NF from 2 ~ 8 tuples: vint32mf2x2_t, vint32mf2x2... vint32mf2x8_t.
So we will end up with over 220+ vector machine mode for RVV.
PLUS the scalar machine modes that we already have in RISC-V port.
The total machine modes in RISC-V port > 256.
Current GCC can not allow us support RVV segment instructions tuple types.
So extend machine mode size from 8bit to 16bit.
I have another solution related to this patch,
May be adding a target dependent macro is better?
Revise this patch like this:
#ifdef TARGET_MAX_MACHINE_MODE_LARGER_THAN_256
ENUM_BITFIELD(machine_mode) last_set_mode : 16;
#else
ENUM_BITFIELD(machine_mode) last_set_mode : 8;
#endif
Not sure whether this solution is better?
This patch Bootstraped on X86 is PASS. Will run make-check gcc-testsuite
tomorrow.
Expecting land in GCC-14, any suggestions ?
gcc/ChangeLog:
* combine.cc (struct reg_stat_type): Extend 8bit to 16bit.
* cse.cc (struct qty_table_elem): Ditto.
(struct table_elt): Ditto.
(struct set): Ditto.
* genopinit.cc (main): Ditto.
* ira-int.h (struct ira_allocno): Ditto.
* ree.cc (struct ATTRIBUTE_PACKED): Ditto.
* rtl-ssa/accesses.h: Ditto.
* rtl.h (struct GTY): Ditto.
(subreg_shape::unique_id): Ditto.
* rtlanal.h: Ditto.
* tree-core.h (struct tree_type_common): Ditto.
(struct tree_decl_common): Ditto.
---
gcc/combine.cc | 4 ++--
gcc/cse.cc | 6 +++---
gcc/genopinit.cc | 2 +-
gcc/ira-int.h | 4 ++--
gcc/ree.cc | 2 +-
gcc/rtl-ssa/accesses.h | 2 +-
gcc/rtl.h | 4 ++--
gcc/rtlanal.h | 2 +-
gcc/tree-core.h | 4 ++--
9 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 053879500b7..af9bae23c92 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -200,7 +200,7 @@ struct reg_stat_type {
unsigned HOST_WIDE_INT last_set_nonzero_bits;
char last_set_sign_bit_copies;
- ENUM_BITFIELD(machine_mode) last_set_mode : 8;
+ ENUM_BITFIELD(machine_mode) last_set_mode : 16;
/* Set nonzero if references to register n in expressions should not be
used. last_set_invalid is set nonzero when this register is being
@@ -235,7 +235,7 @@ struct reg_stat_type {
truncation if we know that value already contains a truncated
value. */
- ENUM_BITFIELD(machine_mode) truncated_to_mode : 8;
+ ENUM_BITFIELD(machine_mode) truncated_to_mode : 16;
};
diff --git a/gcc/cse.cc b/gcc/cse.cc
index 8fbda4ecc86..d78efaa39f7 100644
--- a/gcc/cse.cc
+++ b/gcc/cse.cc
@@ -251,7 +251,7 @@ struct qty_table_elem
/* The sizes of these fields should match the sizes of the
code and mode fields of struct rtx_def (see rtl.h). */
ENUM_BITFIELD(rtx_code) comparison_code : 16;
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
};
/* The table of all qtys, indexed by qty number. */
@@ -406,7 +406,7 @@ struct table_elt
int regcost;
/* The size of this field should match the size
of the mode field of struct rtx_def (see rtl.h). */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
char in_memory;
char is_const;
char flag;
@@ -4146,7 +4146,7 @@ struct set
/* Original machine mode, in case it becomes a CONST_INT.
The size of this field should match the size of the mode
field of struct rtx_def (see rtl.h). */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
/* Hash value of constant equivalent for SET_SRC. */
unsigned src_const_hash;
/* A constant equivalent for SET_SRC, if any. */
diff --git a/gcc/genopinit.cc b/gcc/genopinit.cc
index 83cb7504fa1..3ca3e9fd946 100644
--- a/gcc/genopinit.cc
+++ b/gcc/genopinit.cc
@@ -182,7 +182,7 @@ main (int argc, const char **argv)
progname = "genopinit";
- if (NUM_OPTABS > 0xffff || MAX_MACHINE_MODE >= 0xff)
+ if (NUM_OPTABS > 0xffff || MAX_MACHINE_MODE >= 0xffff)
fatal ("genopinit range assumptions invalid");
if (!init_rtx_reader_args_cb (argc, argv, handle_arg))
diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index e2de47213b4..65ec1678146 100644
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -281,10 +281,10 @@ struct ira_allocno
int regno;
/* Mode of the allocno which is the mode of the corresponding
pseudo-register. */
- ENUM_BITFIELD (machine_mode) mode : 8;
+ ENUM_BITFIELD (machine_mode) mode : 16;
/* Widest mode of the allocno which in at least one case could be
for paradoxical subregs where wmode > mode. */
- ENUM_BITFIELD (machine_mode) wmode : 8;
+ ENUM_BITFIELD (machine_mode) wmode : 16;
/* Register class which should be used for allocation for given
allocno. NO_REGS means that we should use memory. */
ENUM_BITFIELD (reg_class) aclass : 16;
diff --git a/gcc/ree.cc b/gcc/ree.cc
index 413aec7c8eb..e74b96cdfac 100644
--- a/gcc/ree.cc
+++ b/gcc/ree.cc
@@ -567,7 +567,7 @@ enum ext_modified_kind
struct ATTRIBUTE_PACKED ext_modified
{
/* Mode from which ree has zero or sign extended the destination. */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
/* Kind of modification of the insn. */
ENUM_BITFIELD(ext_modified_kind) kind : 2;
diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h
index c5180b9308a..3c928058490 100644
--- a/gcc/rtl-ssa/accesses.h
+++ b/gcc/rtl-ssa/accesses.h
@@ -254,7 +254,7 @@ private:
unsigned int m_spare : 2;
// The value returned by the accessor above.
- machine_mode m_mode : 8;
+ machine_mode m_mode : 16;
};
// A contiguous array of access_info pointers. Used to represent a
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 52f0419af29..c228c89da63 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -313,7 +313,7 @@ struct GTY((desc("0"), tag("0"),
ENUM_BITFIELD(rtx_code) code: 16;
/* The kind of value the expression has. */
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
/* 1 in a MEM if we should keep the alias set for this mem unchanged
when we access a component.
@@ -2157,7 +2157,7 @@ subreg_shape::operator != (const subreg_shape &other)
const
inline unsigned HOST_WIDE_INT
subreg_shape::unique_id () const
{
- { STATIC_ASSERT (MAX_MACHINE_MODE <= 256); }
+ { STATIC_ASSERT (MAX_MACHINE_MODE <= 32768); }
{ STATIC_ASSERT (NUM_POLY_INT_COEFFS <= 3); }
{ STATIC_ASSERT (sizeof (offset.coeffs[0]) <= 2); }
int res = (int) inner_mode + ((int) outer_mode << 8);
diff --git a/gcc/rtlanal.h b/gcc/rtlanal.h
index 5fbed816e20..bdd84e39c76 100644
--- a/gcc/rtlanal.h
+++ b/gcc/rtlanal.h
@@ -100,7 +100,7 @@ public:
/* The mode of the reference. If IS_MULTIREG, this is the mode of
REGNO - MULTIREG_OFFSET. */
- machine_mode mode : 8;
+ machine_mode mode : 16;
/* If IS_MULTIREG, the offset of REGNO from the start of the register. */
unsigned int multireg_offset : 8;
diff --git a/gcc/tree-core.h b/gcc/tree-core.h
index fd2be57b78c..19d7c011530 100644
--- a/gcc/tree-core.h
+++ b/gcc/tree-core.h
@@ -1693,7 +1693,7 @@ struct GTY(()) tree_type_common {
unsigned restrict_flag : 1;
unsigned contains_placeholder_bits : 2;
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
/* TYPE_STRING_FLAG for INTEGER_TYPE and ARRAY_TYPE.
TYPE_CXX_ODR_P for RECORD_TYPE and UNION_TYPE. */
@@ -1776,7 +1776,7 @@ struct GTY(()) tree_decl_common {
struct tree_decl_minimal common;
tree size;
- ENUM_BITFIELD(machine_mode) mode : 8;
+ ENUM_BITFIELD(machine_mode) mode : 16;
unsigned nonlocal_flag : 1;
unsigned virtual_flag : 1;
--
2.36.1
