On 3/23/23 10:53, Peter Bergner wrote:
On 3/23/23 11:32 AM, Jeff Law via Gcc-patches wrote:
On 3/23/23 10:29, Peter Bergner wrote:
I'm sorry that I don't know how REE works. Why can't it optimize this?
I see in the REE dump:
(insn 20 18 22 3 (set (reg:DI 4 4)
(zero_extend:DI (reg:QI 4 4 [orig:120 cD.3556+3 ] [120])))
"pr41742.c":6:41 8 {zero_extendqidi2} (nil))
(call_insn 22 20 41 3 (parallel [
(set (reg:DI 3 3)
(call (mem:SI (symbol_ref:DI ("memset") [flags 0x41]
<function_decl 0x7fff925f8400 __builtin_memset>) [0 memsetD.1196 S4 A8])
(const_int 64 [0x40])))
(use (const_int 0 [0]))
(clobber (reg:DI 96 lr)) ...
Is there a reason why REE cannot see that our (reg:QI 4) is a param register
and thus due to our ABI, already correctly sign/zero extended?
I don't think REE has ever considered exploiting ABI constraints. Handling
that might be a notable improvement on various targets. It'd be a great
place to do some experimentation.
Ok, so sounds like a good follow-on project after this patch is reviewed
and committed (stage1). Thanks for your input!Agreed. I suspect that risc-v will benefit from such work as well.
With that in mind, if y'all start poking at this, please loop in Raphael
(on cc) who's expressed an interest in this space.
Jeff
