Hi!
On Fri, Feb 17, 2023 at 10:28:41PM +0530, Ajit Agarwal wrote:
> This patch replaces fmr instruction (6 cycles) with xxlor instruction ( 2
> cycles)
> Bootstrapped and regtested on powerpc64-linux-gnu.
You tested this on a CPU that does have VSX. It is incorrect on other
(older) CPUs.
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -8436,7 +8436,7 @@
> "@
> stfd%U0%X0 %1,%0
> lfd%U1%X1 %0,%1
> - fmr %0,%1
> + xxlor %0,%1,%1
> lxsd %0,%1
> stxsd %1,%0
> lxsdx %x0,%y1
This is the *mov<mode>_hardfloat64 pattern. You can add some magic to
your Git config so that will show in the patch: in .git/config:
[diff "md"]
xfuncname = "^\\(define.*$"
(As it says in .gitattributes:
# Make diff on MD files use "(define" as a function marker.
# Use together with git config diff.md.xfuncname '^\(define.*$'
# which is run by contrib/gcc-git-customization.sh too.
*.md diff=md
)
The third alternative to this insn, the fmr one, has "d" as both input
and output constraint, and has "*" as isa attribute, so it will be used
on any CPU that has floating point registers. The eight alternative
(the existing xxlor one) has "wa" constraints (via <f64_vsx>) so it
implicitly requires VSX to be enabled. You need to do something similar
for what you want, but you also need to still allow fmr.
Segher
