From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc: Clang-format.
---
gcc/config/riscv/riscv-vsetvl.cc | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index c2a8b44584d..26d096ea939 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -33,7 +33,8 @@ along with GCC; see the file COPYING3. If not see
Assumption:
- - Each avl operand is either an immediate (must be in range 0 ~ 31) or
reg.
+ - Each avl operand is either an immediate (must be in range 0 ~ 31) or
+ reg.
This pass consists of 5 phases:
@@ -43,7 +44,8 @@ along with GCC; see the file COPYING3. If not see
- Phase 2 - Emit vsetvl instructions within each basic block according to
demand, compute and save ANTLOC && AVLOC of each block.
- - Phase 3 - Backward && forward demanded info propagation and fusion
across blocks.
+ - Phase 3 - Backward && forward demanded info propagation and fusion
+ across blocks.
- Phase 4 - Lazy code motion including: compute local properties,
pre_edge_lcm and vsetvl insertion && delete edges for LCM results.
--
2.36.3
