On Mon, 2022-11-14 at 09:34 +0100, Jakub Jelinek wrote: > > Mayshao: how about the status of this feature on Zhaoxin product lines? > > IIRC they support AVX (but disabled by default in GCC for Lujiazui), but > > we don't know if they make the guarantee about atomicity of 16B aligned > > access. > > I did the change on the assumption that only Intel and AMD implement AVX. > Looking around, I'm afraid Zhaoxin Zhangjiang/Wudaokou/Lujiazui > and VIA Eden C and VIA Nano C CPUs do support AVX too, the question is > if they implement CMPXCHG16B too.
According to r13-713, at least Lujiazui has CX16. > From what is in i386-common.cc, none of non-Intel CPUs in there have > PTA_AVX and only Lujiazui has CX16. But that doesn't need to match what > the HW actually does and one can just compile with -mcx16 -mavx -m64 > rather than using some -march=whatever. > > Sure, can change the check so that it checks for AMD too for now and > therefore discard the sync.md patch, the question is whom do we talk at > Zhaoxin and VIA and if there are any further other CX16+AVX CPUs > > Jakub > -- Xi Ruoyao <xry...@xry111.site> School of Aerospace Science and Technology, Xidian University
