2022-10-05 Segher Boessenkool <seg...@kernel.crashing.org>
* config/rs6000/constraints.md (wD): Delete.
* doc/md.texi (Machine Constraints): Adjust.
---
gcc/config/rs6000/constraints.md | 6 ------
gcc/doc/md.texi | 3 ---
2 files changed, 9 deletions(-)
diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md
index 5a44a92142e5..54fef8d9996e 100644
--- a/gcc/config/rs6000/constraints.md
+++ b/gcc/config/rs6000/constraints.md
@@ -107,12 +107,6 @@ (define_constraint "wB"
(match_test "TARGET_P8_VECTOR")
(match_operand 0 "s5bit_cint_operand")))
-(define_constraint "wD"
- "@internal Int constant that is the element number of the 64-bit scalar
- in a vector."
- (and (match_code "const_int")
- (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)")))
-
(define_constraint "wE"
"@internal Vector constant that can be loaded with the XXSPLTIB instruction."
(match_test "xxspltib_constant_nosplit (op, mode)"))
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index bb42ee1da36c..d0a71ecbb806 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3267,9 +3267,6 @@ Like @code{b}, if @option{-mpowerpc64} is used;
otherwise, @code{NO_REGS}.
@item wB
Signed 5-bit constant integer that can be loaded into an Altivec register.
-@item wD
-Int constant that is the element number of the 64-bit scalar in a vector.
-
@item wE
Vector constant that can be loaded with the XXSPLTIB instruction.
--
1.8.3.1
