Andrea Corallo via Gcc-patches <gcc-patches@gcc.gnu.org> writes: > Hi all, > > this patch enables Branch Target Identification Armv8.1-M Mechanism > [1]. > > This is achieved by using the bti pass made common with Aarch64. > > The pass iterates through the instructions and adds the necessary BTI > instructions at the beginning of every function and at every landing > pads targeted by indirect jumps. > > Best Regards > > Andrea > > [1] > <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension> > > gcc/ChangeLog > > 2022-04-07 Andrea Corallo <andrea.cora...@arm.com> > > * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object. > * config/arm/arm-protos.h: Update. > * config/arm/arm.cc (aarch_bti_enabled, aarch_bti_j_insn_p) > (aarch_pac_insn_p, aarch_gen_bti_c, aarch_gen_bti_j): New > functions. > * config/arm/arm.md (bti_nop): New insn. > * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'. > (aarch-bti-insert.o): New target. > * config/arm/unspecs.md (UNSPEC_BTI_NOP): New unspec. > * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Update > to verify arch compatibility. > * config/arm/arm-passes.def: New file. > > gcc/testsuite/ChangeLog > > 2022-04-07 Andrea Corallo <andrea.cora...@arm.com> > > * gcc.target/arm/bti-1.c: New testcase. > * gcc.target/arm/bti-2.c: Likewise.
Ping Andrea
