On Thu, Jul 14, 2022 at 11:20:56AM -0400, Michael Meissner wrote:
> I have applied the patch to GCC 12.
>
> | From 22736f3d0d4fb8ce4afb3230023f8accdb03a623 Mon Sep 17 00:00:00 2001
> | From: Michael Meissner <meiss...@linux.ibm.com>
> | Date: Thu, 14 Jul 2022 11:16:08 -0400
> | Subject: [PATCH] [BACKPORT] Disable generating load/store vector pairs for
> block copies.
>
> Testing has found that using load and store vector pair for block copies
> can result in a slow down on power10. This patch disables using the
> vector pair instructions for block copies if we are tuning for power10.
>
> 2022-06-11 Michael Meissner <meiss...@linux.ibm.com>
>
> gcc/
>
> * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do
> not generate block copies with vector pair instructions if we are
> tuning for power10. Back port from master branch.
You never posted the trunk version of this, so that never was approved
either.
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -4151,7 +4151,10 @@ rs6000_option_override_internal (bool global_init_p)
>
> if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
> {
> - if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX)
> + /* Do not generate lxvp and stxvp on power10 since there are some
> + performance issues. */
> + if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
> + && rs6000_tune != PROCESSOR_POWER10)
> rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
> else
> rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
The TARGET_MMA in that should not be there. Please fix that (that
probably needs more changes).
This statement does the opposite of what the comment says.
Please fix this. On trunk, first.
Segher
