Hi Haochen,
on 2022/5/26 15:35, HAO CHEN GUI wrote:
> Hi,
> This patch fixes the ICE reported in PR100736. It removes the condition
> check of finite math only flag not setting in "*<code><mode>_cc" pattern.
> With or without this flag, we still can use "cror" to check if either
> two bits of CC is set or not for "fp_two" codes. We don't need a reverse
> comparison (implemented by crnot) here when the finite math flag is set,
> as the latency of "cror" and "crnor" are the same.
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> Is this okay for trunk? Any recommendations? Thanks a lot.
>
> ChangeLog
> 2022-05-26 Haochen Gui <[email protected]>
>
> gcc/
> * config/rs6000/rs6000.md (*<code><mode>_cc): Remove condition of
> finite math only flag not setting.
>
> gcc/testsuite/
> * gcc.target/powerpc/pr100736.c: New.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index fdfbc6566a5..a6f9cbc9b8b 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -12995,9 +12995,9 @@ (define_insn_and_split "*<code><mode>_cc"
> [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
> (fp_two:GPR (match_operand:CCFP 1 "cc_reg_operand" "y")
> (const_int 0)))]
> - "!flag_finite_math_only"
> + ""
> "#"
> - "&& 1"
> + ""
Segher added this hunk, not sure if he prefer to keep the condition unchanged
and update the expansion side, looking forward to his comments. :)
> [(pc)]
> {
> rtx cc = rs6000_emit_fp_cror (<CODE>, <MODE>mode, operands[1]);
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr100736.c
> b/gcc/testsuite/gcc.target/powerpc/pr100736.c
> new file mode 100644
> index 00000000000..32cb6df6cd9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr100736.c
> @@ -0,0 +1,12 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_p8vector_ok } */
> +/* { dg-options "-mdejagnu-cpu=power8 -O2 -ffinite-math-only" } */
> +
> +typedef __attribute__ ((altivec (vector__))) unsigned char v;
> +
> +int foo (v a, v b)
> +{
> + return __builtin_vec_bcdsub_ge (a, b, 0);
> +}
> +
> +/* { dg-final { scan-assembler {\mcror\M} } } */
>
The case of PR100736 fails with ICE as reported, maybe we can remove this
dg-final check,
since as you noted in the description above either "cror" or "crnor" are
acceptable,
this extra check could probably make this case fragile.
BR,
Kewen
