From: Jia-Wei Chen <jia...@iscas.ac.cn> Zfinx extension[1] had already finished public review. Here is the implementation patch set that reuse floating point pattern and ban the use of fpr when use zfinx as a target.
Current works can be find in follow links, will keep update zhinx and zhinxmin soon after zfh/zfhmin implemented in gcc. https://github.com/pz9115/riscv-gcc/tree/zfinx-rebase https://github.com/pz9115/riscv-binutils-gdb/tree/zfinx-rebase For test you can use qemu or spike that support zfinx extension, the qemu will go upstream soon and spike is still in review: https://github.com/plctlab/plct-qemu/tree/plct-zfinx-dev https://github.com/plctlab/plct-spike/tree/plct-upstream-zfinx Thanks for Tariq Kurd, Kito Cheng, Jim Willson, Jeremy Bennett helped us a lot with this work. [1] https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf Version log: v2: As Kito Cheng's comment, add Changelog part in patches, update imply info in riscv-common.c, remove useless check and update annotation in riscv.c. v3: Update with new isa-spec version 20191213, make zfinx imply zicsr as default, fix the lack of fcsr use in zfinx. jiawei (3): RISC-V: Minimal support of zfinx extension. RISC-V: Target support for zfinx extension. RISC-V: Limit regs use for zfinx extension. gcc/common/config/riscv/riscv-common.cc | 9 ++++ gcc/config/riscv/arch-canonicalize | 3 ++ gcc/config/riscv/constraints.md | 4 +- gcc/config/riscv/riscv-builtins.cc | 4 +- gcc/config/riscv/riscv-c.cc | 2 +- gcc/config/riscv/riscv-opts.h | 6 +++ gcc/config/riscv/riscv.cc | 14 ++++- gcc/config/riscv/riscv.md | 72 ++++++++++++------------- gcc/config/riscv/riscv.opt | 3 ++ 9 files changed, 75 insertions(+), 42 deletions(-) -- 2.25.1
